LPC1313 datasheet(21/53 Pages) NXP

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LPC1311_13_42_43_1

Product data sheet

Rev. 01 — 11 December 2009

21 of 53

NXP Semiconductors

LPC1311/13/42/43

32-bit ARM Cortex-M3 microcontroller

– Set LOW on match.

– Set HIGH on match.

– Toggle on match.

– Do nothing on match.

7.15 System tick timer

The ARM Cortex-M3 includes a system tick timer (SYSTICK) that is intended to generate

a dedicated SYSTICK exception, normally set to a 10 ms interval.

7.16 Watchdog timer

The purpose of the watchdog is to reset the microcontroller within a reasonable amount of

time if it enters an erroneous state. When enabled, the watchdog will generate a system

reset if the user program fails to ‘feed’ (or reload) the watchdog within a predetermined

amount of time.

7.16.1 Features

• Internally resets chip if not periodically reloaded.

• Debug mode.

• Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be

disabled.

• Incorrect/incomplete feed sequence causes reset/interrupt if enabled.

• Flag to indicate watchdog reset.

• Programmable 32-bit timer with internal prescaler.

• Selectable time period from (Tcy(WDCLK) × 256 × 4) to (Tcy(WDCLK) × 232 × 4) in

multiples of Tcy(WDCLK) × 4.

• The Watchdog Clock (WDCLK) source can be selected from the Internal RC oscillator

(IRC), the watchdog oscillator, or the main clock. This gives a wide range of potential

timing choices of watchdog operation under different power reduction conditions. It

also provides the ability to run the WDT from an entirely internal source that is not

dependent on an external crystal and its associated components and wiring for

increased reliability.

7.17 Clocking and power control

7.17.1 Crystal oscillators

The LPC1311/13/42/43 include three independent oscillators. These are the system

oscillator, the Internal RC oscillator (IRC), and the watchdog oscillator. Each oscillator can

be used for more than one purpose as required in a particular application.

Following reset, the LPC1311/13/42/43 will operate from the internal RC oscillator until

switched by software. This allows systems to operate without any external crystal and the

bootloader code to operate at a known frequency.

See Figure 7 for an overview of the LPC1311/13/42/43 clock generation.

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