ADS58C48IPFPR datasheet(13/70 Pages) TI

13 / 70 page

T0109-01

RegisterData

(SCLK)

(DSU)

(DH)

(SLOADS)

SDATA

SCLK

SEN

RESET

(SLOADH)

ADS58C48

www.ti.com

SLAS689 – MAY 2010

Figure 6. Serial Interface Timing

SERIAL INTERFACE TIMING CHARACTERISTICS

Typical values at 25°C, min and max values across the full temperature range TMIN = –40°C to TMAX = 85°C,

AVDD = 1.8 V, DRVDD = 1.8 V, unless otherwise noted.

PARAMETER

MIN

TYP

MAX

UNIT

fSCLK

SCLK frequency (= 1/ tSCLK)

> DC

MHz

tSLOADS

SEN to SCLK setup time

tSLOADH

SCLK to SEN hold time

tDS

SDATA setup time

tDH

SDATA hold time

Serial Register Readout

The device includes an option where the contents of the internal registers can be read back. This may be useful

as a diagnostic check to verify the serial interface communication between the external controller and the ADC.

a. First, set register bit <READOUT> = 1 to put the device in serial readout mode. This disables any further

writes into the registers, EXCEPT the register at address 0. Note that the <READOUT> bit is also located in

b. Also, only the contents of register at address 0 cannot be read in the register readout mode

c. Initiate a serial interface cycle specifying the address of the register (A7 – A0) whose content has to be read.

d. The device outputs the contents (D15 – D0) of the selected register on the SDOUT pin

e. The external controller can latch the contents at the falling edge of SCLK.

To enable register writes, reset register bit <READOUT> = 0.

The serial register readout works with CMOS and LVDS interfaces.

When <READOUT> is disabled, SDOUT pin is in high-impedance state.

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