33480 datasheet(21/39 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33480

OPERATIONAL MODES

Figure 8. Operating Modes State Machine

START-UP SEQUENCE

The 33480 enters in Normal Mode after start-up if following

sequence is provided:

• Vbat and Vcc power supplies must be above their

undervoltage thresholds (Sleep mode).

• generate wake up event (wake=1) from 0 to 1 on RSTB.

The device switches to normal mode.

• apply PWM clock after maximum 200us (min 50us).

• send SPI command to the Device status register to

clear the clock fail flag to enable the PWM module to

start.

If the correct start-up sequence is not provided, the PWM

function is not guaranteed.

The following figure describes the wake-up block diagram.

Sleep

(fail=0) and (wake=1)

(wake=0)

Fail

Normal

(wake=0)

(fail=1) and (wake=1)

(fail=0) and (wake=1)

(wake=1) and (fail=1) *

Notes:

* only available in case of Vcc fail condition

wake=(RSTB=1) OR (IGN_ON=1) OR (Flasher_ON=1)

fail=(Vcc_fail=1) OR (SPI_fail=1) OR (ext_limp=1)

Power OFF

VBAT > VBATPOR

VBAT < VBATPOR

33480 Datenblatt(PDF) 21 Page - Freescale Semiconductor, Inc