LPC1850 datasheet(22/157 Pages) PHILIPS

22 / 157 page

LPC1850_30_20_10

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Preliminary data sheet

Rev. 3 — 6 December 2011

22 of 157

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

P3_7

C11

176

123

[3]

I; PU -

R — Function reserved.

I/O

SSP0_MISO — Master In Slave Out for SSP0.

I/O

SPIFI_MOSI — Input 0 in SPIFI quad mode; SPIFI

output IO0.

I/O

GPIO5[10] — General purpose digital input/output

pin.

I/O

SSP0_MOSI — Master Out Slave in for SSP0.

R — Function reserved.

P3_8

C10

179

124

[3]

I; PU -

R — Function reserved.

I/O

SSP0_MOSI — Master Out Slave in for SSP0.

I/O

SPIFI_CS — SPIFI serial flash chip select.

I/O

GPIO5[11] — General purpose digital input/output

pin.

I/O

SSP0_SSEL — Slave Select for SSP0.

R — Function reserved.

P4_0

[3]

I; PU I/O

GPIO2[0] — General purpose digital input/output pin.

MCOA0 — Motor control PWM channel 0, output A.

NMI — External interrupt input to NMI.

R — Function reserved.

LCD_VD13 — LCD data.

I/O

U3_UCLK — Serial clock input/output for USART3 in

synchronous mode.

R — Function reserved.

P4_1

[6]

I; PU I/O

GPIO2[1] — General purpose digital input/output pin.

CTOUT_1 — SCT output 1. Match output 1 of

timer 0.

LCD_VD0 — LCD data.

R — Function reserved.

LCD_VD19 — LCD data.

U3_TXD — Transmitter output for USART3.

ENET_COL — Ethernet Collision detect (MII

interface).

ADC0_1 — ADC0, input channel 1.

Table 3.

Pin description …continued

LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2.

Symbol

Description

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