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HT46R92 Datenblatt(PDF) 27 Page - Holtek Semiconductor Inc |
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HT46R92 Datenblatt(HTML) 27 Page - Holtek Semiconductor Inc |
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27 / 61 page ![]() HT46R92 Rev. 1.10 27 November 5, 2008 The START bit in the ADCR register is used to start and reset the A/D converter. When the microcontroller sets this bit from low to high and then low again, an analog to digital conversion cycle will be initiated. When the START bit is brought from low to high but not low again, the EOCB bit in the ADCR register will be set to a ²1² and the analog to digital converter will be reset. It is the START bit that is used to control the overall on/off opera- tion of the internal analog to digital converter. The EOCB bit in the ADCR register is used to indicate when the analog to digital conversion process is com- plete. This bit will be automatically set to ²0² by the microcontroller after a conversion cycle has ended. In addition, the corresponding A/D interrupt request flag will be set in the interrupt control register, and if the inter- rupts are enabled, an appropriate internal interrupt sig- nal will be generated. This A/D internal interrupt signal will direct the program flow to the associated A/D inter- nal interrupt address for processing. If the A/D internal interrupt is disabled, the microcontroller can be used to poll the EOCB bit in the ADCR register to check whether it has been cleared as an alternative method of detect- ing the end of an A/D conversion cycle. A/D Converter Power Control As an integrated circuit function within the device, the A/D converter will naturally consume a limited amount of power. However to provide users with a means of on/off control to reduce power consumption, two methods are provided. One means of turning off the A/D converter circuitry is to ensure that the PCR0~PCR2 bits in the ADCR register are cleared to zero. Another method is to use the ADONB bit in the ACSR register, which if set high will also turn off the A/D internal circuitry. Both power off methods are independent and have overriding control over the other. PCR Bits ADONB Bit A/D Circuits 0 X Off >0 0 On > 0 1 Off A/D Power Control It should be noted that the power supply to the A/D con- verter is supplied via the VDD pin. However the lowest operating voltage of the analog circuitry is higher than that of the digital circuitry and therefore the analog cir- cuits will fail to operate at the lower end of the VDD specification. The DC Characteristics therefore specify a separate operating voltage specification for the analog circuitry. A/D Converter Clock Source Register - ACSR The clock source for the A/D converter, which originates from the system clock fSYS, is first divided by a division ratio, the value of which is determined by the ADCS1 and ADCS0 bits in the ACSR register. b 7 b 0 S T A R T P C R 2 P C R 1 P C R 0 A C S 2 A C S 1 A C S 0 S e l e c t A / D c h a n n e l A C S 2 0 0 0 0 1 1 1 1 A C S 1 0 0 1 1 0 0 1 1 A C S 0 0 1 0 1 0 1 0 1 A N 0 A N 1 A N 2 A N 3 A N 4 A N 5 u n d e f i n e d u n d e f i n e d P o r t B A / D c h a n n e l c o n f i g u r a t i o n s P C R 2 0 0 0 0 1 1 1 1 P C R 1 0 0 1 1 0 0 1 1 P C R 0 0 1 0 1 0 1 0 1 P o r t B A / D c h a n n e l s - a l l o f f P B 0 e n a b l e d a s A N 0 P B 0 ~ P B 1 e n a b l e d a s A N 0 ~ A N 1 P B 0 ~ P B 2 e n a b l e d a s A N 0 ~ A N 2 P B 0 ~ P B 3 e n a b l e d a s A N 0 ~ A N 3 P B 0 ~ P B 4 e n a b l e d a s A N 0 ~ A N 4 P B 0 ~ P B 5 e n a b l e d a s A N 0 ~ A N 5 P B 0 ~ P B 5 e n a b l e d a s A N 0 ~ A N 5 E n d o f A / D c o n v e r s i o n f l a g 1 : n o t e n d o f A / D c o n v e r s i o n - A / D c o n v e r s i o n w a i t i n g o r i n p r o g r e s s 0 : e n d o f A / D c o n v e r s i o n - A / D c o n v e r s i o n e n d e d S t a r t t h e A / D c o n v e r s i o n 0 ® 1 ® 0 : S t a r t 0 ® 1 : R e s e t A / D c o n v e r t e r a n d s e t E O C B t o " 1 " E O C B A D C R R e g i s t e r A/D Converter Control Register |
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