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SSM2804CBZ-R7 Datenblatt(PDF) 30 Page - Analog Devices |
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SSM2804CBZ-R7 Datenblatt(HTML) 30 Page - Analog Devices |
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30 / 36 page ![]() SSM2804 Rev. 0 | Page 30 of 36 ALC CONTROL 1, ADDRESS 0x0A Table 34. ALC Control 1 Register Bit Map D7 D6 D5 D4 D3 D2 D1 D0 0 0 RECTIME[2:0] ATTIME[2:0] Table 35. ALC Control 1 Register Bit Descriptions Bit Name Description Settings RECTIME[2:0] ALC release rate 000 = 4 ms per 0.5 dB step (6 dB/48 ms) 001 = 8 ms 010 = 16 ms 011 = 32 ms 100 = 64 ms 101 = 128 ms (default) 110 = 256 ms 111 = 512 ms ATTIME[2:0] ALC attack rate 000 = 32 μs per 0.5 dB step (6 dB/384 μs) 001 = 64 μs 010 = 128 μs 011 = 256 μs (default) 100 = 512 μs 101 = 1 ms 110 = 2 ms 111 = 4 ms |
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