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SST49LF040 Datenblatt(PDF) 31 Page - Silicon Storage Technology, Inc

Teilenummer SST49LF040
Bauteilbeschribung  4 Mbit LPC Flash
PDF  48 Pages
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Hersteller  SST [Silicon Storage Technology, Inc]
Direct Link  http://www.sst.com/
Logo SST - Silicon Storage Technology, Inc

SST49LF040 Datenblatt(HTML) 31 Page - Silicon Storage Technology, Inc

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Advance Information
4 Mbit LPC Flash
SST49LF040
31
©2001 Silicon Storage Technology, Inc.
S71213-00-000
11/01 562
FIGURE 18: RESET TIMING DIAGRAM
TABLE 21: RESET TIMING PARAMETERS (PP MODE), VDD=3.0-3.6V
Symbol
Parameter
Min
Max
Units
TPRST
VDD stable to Reset Low
1
ms
TRSTP
RST# Pulse Width
100
ns
TRSTF
RST# Low to Output Float
48
ns
TRST1
RST# High to Row Address Setup
1
µs
TRSTE
RST# Low to reset during Sector-/Block-Erase or Program
10
µs
TRSTC
RST# Low to reset during Chip-Erase
50
µs
T21.0 562
1. There will be a reset latency of TRSTE or TRSTC if a reset procedure is performed during a programming or erase operational.
VDD
RST#
Addresses
R/C#
DQ7-0
562 ILL F18.0
TPRST
TRSTP
TRSTF
TRSTE
Row Address
Sector-/Block-Erase
or Program operation
aborted
TRST
TRSTC
Chip-Erase
aborted



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