AD7660AST datasheet(12/20 Pages) AD

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REV. 0

AD7660

–12–

TYPICAL CONNECTION DIAGRAM

Figure 6 shows a typical connection diagram for the AD7660.

OR INGND

AGND

AVDD

Figure 5. Equivalent Analog Input Circuit

Analog Input

Figure 5 shows an equivalent circuit of the input structure of the

AD7660.

The two diodes D1 and D2 provide ESD protection for the

analog inputs IN and INGND. Care must be taken to ensure

that the analog input signal never exceeds the supply rails by

more than 0.3 V. This will cause these diodes to become for-

ward-biased and start conducting current. These diodes can

handle a forward-biased current of 100 mA maximum. For

instance, these conditions could eventually occur when the

input buffer's (U1) supplies are different from AVDD. In such

case, an input buffer with a short circuit current limitation can

be used to protect the part.

This analog input structure allows the sampling of the differen-

tial signal between IN and INGND. Unlike other converters,

the INGND input is sampled at the same time as the IN input.

By using this differential input, small signals common to both

inputs are rejected as shown in Figure 7 which represents the

typical CMR over frequency. For instance, by using INGND to

sense a remote signal ground, difference of ground potentials

between the sensor and the local ADC ground are eliminated.

COMMON-MODE INPUT FREQUENCY – Hz

0.1k

10k

100k

10M

Figure 7. Analog Input CMR vs. Frequency

During the acquisition phase, the impedance of the analog input

IN can be modeled as a parallel combination of capacitor C1

and the network formed by the series connection of R1 and C2.

Capacitor C1 is primarily the pin capacitance. The resistor R1 is

typically 3242

Ω and is a lumped component made up of some

serial resistor and the on resistance of the switches. The capacitor

C2 is typically 60 pF and is mainly the ADC sampling capacitor.

During the conversion phase, where the switches are opened,

the input impedance is limited to C1. It has to be noted that the

input impedance of the AD7660, unlike other SAR ADCs, is

not a pure capacitance and thus, inherently reduces the kickback

transient at the beginning of the acquisition phase. The R1, C2

makes a one-pole low-pass filter that reduces undesirable

aliasing effect and limits the noise.

100nF

10 F

100nF

10 F

AVDD

10 F

100nF

AGND

DGND

DVDD

OVDD

OGND

SER/

PAR

CNVST

BUSY

SDOUT

SCLK

RESET

INGND

U12

REFGND

100nF

CREF1

2.5V REF1

REF

100

CLOCK

AD7660

ANALOG INPUT

(0V TO 2.5V)

C/ P/DSP

SERIAL

PORT

DIGITAL SUPPLY

(3.3V OR 5V)

ANALOG

SUPPLY

(5V)

DVDD

OB/

NOTES:

1WITH THE AD780 OR THE ADR291 VOLTAGE REFERENCE, CREF IS 47 F

2THE AD8519 IS RECOMMENDED

3OPTIONAL LOW JITTER

CNVST

Figure 6. Typical Connection Diagram

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