AD9761ARS datasheet(16/23 Pages) AD

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AD9761

–16–

REV. A

The differential circuit shown in Figure 37 provides the neces-

sary level-shifting required in a single supply system. In this

case, AVDD, which is the positive analog supply for both the

AD9761 and the op amp is also used to level-shift the differen-

tial output of the AD9761 to midsupply (i.e., AVDD/2).

COPT

200

IOUTA

IOUTB

AD9761

RLOAD

200

AD8042

500

RLOAD

AVDD

Figure 37. Single-Supply DC Differential Coupled

Circuit

SINGLE-ENDED UNBUFFERED VOLTAGE OUTPUT

Figure 38 shows the AD9761 configured to provide a unipolar

output range of approximately 0 V to +0.5 V since the nominal

full-scale current, IOUTFS, of 10 mA flows through an RLOAD of

Ω. In the case of a doubly terminated low-pass filter, R

LOAD

represents the equivalent load resistance seen by IOUTA or

IOUTB. The unused output (IOUTA or IOUTB) can be con-

nected to ACOM directly or via a matching RLOAD. Different

values of IOUTFS and RLOAD can be selected as long as the posi-

tive compliance range is adhered to.

IOUTA

IOUTB

AD9761

IOUTFS = 10mA

VOUT =

0V TO 0.5V

Figure 38. 0 V to +0.5 V Unbuffered Voltage Output

DIFFERENTIAL, DC COUPLED OUTPUT

CONFIGURATION WITH LEVEL SHIFTING

Some applications may require the AD9761 differential outputs

to interface to a single supply quadrature upconverter. Although

most of these devices provide differential inputs, its common-

mode voltage range does not typically extend to ground. As a

result, the ground-referenced output signals shown in Figure 38

must be level shifted to within the specified common-mode

range of the single-supply quadrature upconverter. Figure 39

shows the addition of a resistor pull-up network which provides

the level shifting function. The use of matched resistor networks

will maintain maximum gain matching and minimum offset

performance between the I and Q channels. Note, the resistor

pull-up network will introduce approximately 6 dB of signal

attenuation.

IOUTA

IOUTB

AD9761

500

AVDD

VIN+

VIN–

QUADRATURE

UPCONVERTER

*OHMTEK TO MC-1603-5000D

**OHMTEK TO MC-1603-1000D

Figure 39. Differential, DC Coupled Output Configuration

with Level-Shifting

POWER AND GROUNDING CONSIDERATIONS

In systems seeking to simultaneously achieve high speed and

high performance, the implementation and construction of the

printed circuit board design is often as important as the circuit

design. Proper RF techniques must be used in device selection;

placement and routing; and supply bypassing and grounding.

The evaluation board for the AD9761, which uses a four-layer

PC board, serves as a good example for the above mentioned

considerations. The evaluation board provides an illustration of

the recommended printed circuit board ground, power and

signal plane layout.

Proper grounding and decoupling should be a primary objective

in any high speed, high resolution system. The AD9761 features

separate analog and digital supply and ground pins to optimize

the management of analog and digital ground currents in a system.

In general, AVDD, the analog supply, should be decoupled to

ACOM, the analog common, as close to the chip as physically

possible. Similarly, DVDD, the digital supply should be decoupled

as closely as physically as possible to DCOM.

For those applications requiring a single +5 V or +3 V supply

for both the analog and digital supply, a clean analog supply

may be generated using the circuit shown in Figure 40. The

circuit consists of a differential LC filter with separate power

supply and return lines. Lower noise can be attained using low

ESR type electrolytic and tantalum capacitors.

0.1 F

CER.

10-22 F

TANT.

100 F

ELECT.

AVDD

ACOM

––

FERRITE

BEADS

+5V OR +3V POWER

SUPPLY

TTL/CMOS

LOGIC

CIRCUITS

Figure 40. Differential LC Filter for Single +5 V or +3 V

Applications

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