| Datenblatt-Suchmaschine für elektronische Bauteile |
|
STM32F103RG Datenblatt(PDF) 68 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32F103RG Datenblatt(HTML) 68 Page - STMicroelectronics |
|
68 / 120 page ![]() Electrical characteristics STM32F103xF, STM32F103xG 68/120 Doc ID 16554 Rev 3 Table 36. Synchronous multiplexed NOR/PSRAM read timings(1) 1. CL = 15 pF. Symbol Parameter Min Max Unit tw(CLK) FSMC_CLK period 27.6 - ns td(CLKL-NExL) FSMC_CLK low to FSMC_NEx low (x = 0...2) - 0.5 ns td(CLKL-NExH) FSMC_CLK low to FSMC_NEx high (x = 0...2) 1 - ns td(CLKL-NADVL) FSMC_CLK low to FSMC_NADV low - 1 ns td(CLKL-NADVH) FSMC_CLK low to FSMC_NADV high 0.5 - ns td(CLKL-AV) FSMC_CLK low to FSMC_Ax valid (x = 0...25) - 0 ns td(CLKL-AIV) FSMC_CLK low to FSMC_Ax invalid (x = 16...25) 1.5 - ns td(CLKL-NOEL) FSMC_CLK low to FSMC_NOE low - 14 ns td(CLKL-NOEH) FSMC_CLK low to FSMC_NOE high 1 - ns td(CLKL-ADV) FSMC_CLK low to FSMC_AD[15:0] valid - 11 ns td(CLKL-ADIV) FSMC_CLK low to FSMC_AD[15:0] invalid 0.5 - ns tsu(ADV-CLKH) FSMC_A/D[15:0] valid data before FSMC_CLK high 2- ns th(CLKH-ADV) FSMC_A/D[15:0] valid data after FSMC_CLK high 0 - ns |
|
Link URL |
| War ALLDATASHEET hilfreich? [ DONATE ] |
Über Alldatasheet | Werbung | Kontakt | Privatsphäre und Datenschutz | Link zum Datenblatt | Linktausch | Hersteller All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |