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STM32F103RG Datenblatt(PDF) 51 Page - STMicroelectronics |
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STM32F103RG Datenblatt(HTML) 51 Page - STMicroelectronics |
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51 / 120 page ![]() STM32F103xF, STM32F103xG Electrical characteristics Doc ID 16554 Rev 3 51/120 Table 19. Typical current consumption in Sleep mode, code running from Flash or RAM Symbol Parameter Conditions fHCLK Typ(1) 1. Typical values are measures at TA = 25 °C, VDD = 3.3 V. Unit All peripherals enabled(2) 2. Add an additional power consumption of 0.8 mA per ADC for the analog part. In applications, this consumption occurs only while the ADC is on (ADON bit is set in the ADC_CR2 register). All peripherals disabled IDD Supply current in Sleep mode External clock(3) 3. External clock is 8 MHz and PLL is on when fHCLK > 8 MHz. 72 MHz 32.5 7 mA 48 MHz 23 5 36 MHz 17.7 4 24 MHz 12.2 3.1 16 MHz 8.4 2.3 8 MHz 4.6 1.5 4 MHz 3 1.3 2 MHz 2.15 1.25 1 MHz 1.7 1.2 500 kHz 1.5 1.15 125 kHz 1.35 1.15 Running on high speed internal RC (HSI), AHB prescaler used to reduce the frequency 64 MHz 28.7 5.7 48 MHz 22 4.4 36 MHz 17 3.35 24 MHz 11.6 2.3 16 MHz 7.7 1.6 8 MHz 3.9 0.8 4 MHz 2.3 0.7 2 MHz 1.5 0.6 1 MHz 1.1 0.5 500 kHz 0.9 0.5 125 kHz 0.7 0.5 |
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