AMMC002AWP datasheet(21/39 Pages) AMD

21 / 39 page

AmMC0XXA

PREL I M I N AR Y

Table 14.

Embedded Program Algorithm

Figure 5.

Embedded Program Algorithm

Reset Command

The device automatically powers up in the read/reset

state. A command sequence is not required to read

data in this case. Standard microprocessor cycles re-

trieve array data. This default state ensures that no

spurious alteration of the memory content occurs dur-

ing the power transition. Refer to the AC Characteris-

tics section for the specific timing parameters.

The reset operation is initiated by writing the read/reset

command sequence into the command register. Micro-

processor read cycles retrieve array data from the

memory. The device remains enabled for reads until

the command register contents are altered.

Sector Erase Suspend

Sector Erase Suspend command allows the user to in-

terrupt the chip and then do data reads (not program)

from a non-busy sector while it is in the middle of a Sec-

tor Erase operation (which may take up to several sec-

onds). This command is applicable ONLY during the

Sector Erase operation and will be ignored if written

during the chip Erase or Programming operation. The

Erase Suspend command (B0h) will be allowed only

during the Sector Erase Operation that will include the

sector erase time-out period after the Sector Erase

commands (30h). Writing this command during the

time-out will result in immediate termination of the

time-out period. Any subsequent writes of the Sector

Erase command will be ignored as such, but instead

will be taken as the Erase Resume command. Note

that any other commands during the time out will reset

the device to read mode. The addresses are

don’t-cares in writing the Erase Suspend or Erase Re-

sume commands.

When the Sector Erase Suspend command is written

during a Sector Erase operation, the chip will take be-

tween 0.1

µs to 10 µs to suspend the erase operation

and go into erase suspended read mode (pseudo-read

mode), during which the user can read from a sector

that is NOT being erased. A read from a sector being

erased may result in invalid data. The user must moni-

tor D6 to determine if the chip has entered the pseu-

do-read mode, at which time D6 stops toggling. Note

that the user must keep track of what state the chip is

in since there is no external indication of whether the

chip is in pseudo-read mode or actual read mode. After

the user writes the Sector Erase Suspend command

and waits until D6 stops toggling, data reads from the

device may then be performed. Any further writes of

the Sector Erase Suspend command at this time will be

ignored.

To resume the operation of Sector Erase, the Resume

command (30H) should be written. Any further writes of

the Resume command at this point will be ignore.

Another Sector Erase Suspend command can be

written after the chip has resumed.

Write Operation Status

Table 15 shows the status bit states for device program

and erase operations.

Data Polling—D7 (D15 on Odd Byte)

The AMD Flash Miniature Card features Data Polling

as a method to indicate to the host system that the

Embedded algorithms are either in progress or com-

pleted (The host may alternatively monitor BUSY#

(RY/BY#).

While the Embedded Programming algorithm is in oper-

ation, an attempt to read the device will produce the

complement of expected valid data on D7 of the

addressed memory sector or memory device. Upon

completion of the Embedded Program algorithm an

Bus

Operation

Command

Comments

Standby

Wait for VCC ramp

Write

Embedded Program

command sequence

3 bus cycle operation

Write

Program

Address/Data

1 bus cycle operation

Read

Data Poll or check

BUSY# (RY/BY#) to

verify program

Write Embedded Write Command

Sequence per Tables 5– 10

Verify

Data

Data Poll Device

or wait for BUSY# (RY/BY#)

Increment

Address

Start

Completed

Last

Address

20975D-6

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