AMMC002AWP datasheet(12/39 Pages) AMD

12 / 39 page

AmMC0XXA

PR EL IMIN AR Y

Autoselect Operation

A host system or external card reader/writer can deter-

mine the on-card manufacturer and device I.D. codes.

Codes are available after writing the 90h command to

the command register of a memory device, as shown in

Tables 5 through 10. When the autoselect command is

issued to card address 00000h, the Miniature Card

re tur n s the manufactu rer I.D. If the au toselect

command is issued to card address 00001h, the Minia-

ture Card provides the device I.D.

To t e r m inat e t he Au to Selec t o per at ion, the

Read/Reset command sequence must be written to the

same device. The Autoselect command operates only

if the card is not write protected.

Sector Group Protection

Sector group protection can be used to permanently

disable program and erase operations in any combina-

tion of sector groups on the Flash memory components

used in AMD Miniature Cards. Each sector group con-

sists of four adjacent sectors within each device. The

pattern begins at SA0: SA0–3, SA4–7, SA8–11, and so

on. This protection must be performed prior to manu-

facturing the Miniature Cards. None of the sector

groups are protected on the standard Miniature Card

product offerings.

The host system must compensate for these protected

sector groups by determining their locations, then

ignoring those locations for reading and writing data. To

determine whether a sector group is protected, the

system would write the first three cycles of the Autose-

lect command, then on the fourth cycle, read at the

address (SA)02h, where SA is the sector address (see

Tables 11 and 12) within an individual device. A pro-

tected sector group produces “01h”, and an unpro-

tected sector group produces “00h”.

Write Operations

Write and erase operations are valid only when VCC is

above 4.5 V. This activates the state machine of an

addressed memory device. The command register is a

latch which saves address, commands, and data infor-

mation used by the state machine and memory array.

When Write Enable (WE#) and appropriate CE#

signals are at a logic-level low, and Output Enable

(OE#) is at a logic-high, the command register is

enabled for write operations. The falling edge of WE#

latches address information and the rising edge latches

data/command information.

Write or erase operations are performed by writing

appropriate data patterns to the command register of

accessed Flash memory devices.

The byte-wide commands are defined in Tables 6, 7, 9,

and 10; word-wide commands are defined in Tables 5

and 8. Note that the Erase Suspend (B0h) and Erase

Resume (30h) commands are valid only while the

Sector Erase operation is in progress.

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