SCA3000 Series

VTI Technologies Oy

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www.vti.fi

Doc.Nr. 8257300A.07

Rev.A.07

4.2.2

Examples of I

Examples of I

S

0 SA

SA

SA

SA

device addr 1st byte

11110AA

device addr 2nd byte

AAAAAAAA

register addr

8 bits, MSB first

register data

8 bits, MSB first

CASE 1: I2C 8 bit write

S

0 SA

SA

SA

SA

device addr 1st byte

11110AA

device addr 2nd byte

AAAAAAAA

register addr

8 bits, MSB first

register data, addr + 0

8 bits, MSB first

CASE 2: I2C 16 bit write (any number of bytes can be written, length is determined by end condition generated by master)

SA

register data, addr - 1

8 bits, MSB first

E

S

0 SA

SA

MA

device addr 1st byte

11110AA

device addr 2nd byte

AAAAAAAA

register data, addr

8 bits, MSB first

CASE 3: I2C 8 bit read, read address for SCA3000 series register should be written to I2C_RD_SEL register

CASE 4: I2C 16 bit read (any number of bytes can be read, length is determined by end condition generated by master).

Automatic register address changing depends on selected start address in I2C_RD_SEL (noted by addr and addr_x on the figure).

E

S

= Start condition

RS = Repeated start condition

E

= End condition

SA = Slave Acknowledgement

MA = Master Acknowledgement

AA = Device address, 10 bits

Read/write select bit

(0=write, 1=read)

RS

device addr 1st byte

11110AA

1 SA

S

0 SA

SA

MA

device addr 1st byte

11110AA

device addr 2nd byte

AAAAAAAA

register data, addr

8 bits, MSB first

E

RS

device addr 1st byte

11110AA

1 SA

MA

register data, addr_x

8 bits, MSB first

E

Figure 10. I