IO10PDB0V0 datasheet(37/197 Pages) MICROSEMI

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SmartFusion Customizable System-on-Chip (cSoC)

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Table 2-24 • Summary of I/O Timing Characteristics—Software Default Settings

–1 Speed Grade, Worst Commercial-Case Conditions: TJ = 85°C, Worst Case VCC = 1.425 V,

Worst-Case VCCxxxxIOBx (per standard)

Applicable to FPGA I/O Banks, Assigned to EMC I/O Pins

I/O Standard

3.3VLVTTL/

3.3 V LVCMOS

12 mA

High

–

0.50 2.81 0.03 0.81 0.32 2.86 2.23 2.55 2.82 4.58 3.94 ns

2.5 V LVCMOS

12 mA

High

–

0.50 2.73 0.03 1.03 0.32 2.88 2.69 2.62 2.70 4.60 4.41 ns

1.8 V LVCMOS

12 mA

High

–

0.50 2.81 0.03 0.95 0.32 2.87 2.38 2.92 3.18 4.58 4.10 ns

1.5 V LVCMOS

12 mA

High

–

0.50 3.24 0.03 1.12 0.32 3.30 2.79 3.10 3.27 5.02 4.50 ns

3.3 V PCI

Per PCI spec High

251 0.50 2.11 0.03 0.68 0.32 2.15 1.57 2.55 2.82 3.87 3.28 ns

3.3 V PCI-X

Per PCI-X

spec

High

251 0.50 2.11 0.03 0.64 0.32 2.15 1.57 2.55 2.82 3.87 3.28 ns

LVDS

24 mA

High

–

0.50 1.53 0.03 1.55

–

LVPECL

24 mA

High

–

0.50 1.46 0.03 1.46

–

Notes:

1. Resistance is used to measure I/O propagation delays as defined in PCI specifications. See Figure 2-10 on page 2-39 for

connectivity. This resistor is not required during normal operation.

2. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-9 for derating values.

Table 2-25 • Summary of I/O Timing Characteristics—Software Default Settings

–1 Speed Grade, Worst Commercial-Case Conditions: TJ = 85°C, Worst Case VCC = 1.425 V,

Worst-Case VCCxxxxIOBx (per standard)

Applicable to MSS I/O Banks

I/O Standard

3.3 V LVTTL /

3.3 V LVCMOS

8 mA

High

–

0.18 1.92 0.07 0.78 1.09 0.18 1.96 1.55 1.83 2.04 ns

2.5 V LVCMOS

8 mA

High

–

0.18 1.96 0.07 0.99 1.16 0.18 2.00 1.82 1.82 1.93 ns

1.8 V LVCMOS

4 mA

High

–

0.18 2.31 0.07 0.91 1.37 0.18 2.35 2.27 1.84 1.87 ns

1.5 V LVCMOS

2 mA

High

–

0.18 2.70 0.07 1.07 1.55 0.18 2.75 2.67 1.87 1.85 ns

Notes:

1. Resistance is used to measure I/O propagation delays as defined in PCI specifications. See Figure 2-10 on page 2-39 for

connectivity. This resistor is not required during normal operation.

2. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-9 for derating values.

IO10PDB0V0 Datenblatt(PDF) 37 Page - Microsemi Corporation

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