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GMS97C2051 Datenblatt(PDF) 21 Page - Hynix Semiconductor

Teilenummer GMS97C2051
Bauteilbeschribung  8-Bit CMOS Microcontorller
PDF  39 Pages
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Hersteller  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

GMS97C2051 Datenblatt(HTML) 21 Page - Hynix Semiconductor

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8-Bit CMOS Microcontorller
GMS97C1051/L1051
HYUNDAI MicroElectronics
21
Features
 Compatible with MCS-51
TM Products
 1 Kbytes of programmable EPROM
 4.25V to 5.5V Operating Range (GMS97C1051)
2.70V to 3.6V Operating Range (GMS97L1051)
 Version for 12MHz / 24 MHz Operating frequency (GMS97C1051)
Only 12MHz Operating frequency (GMS97L1051)
 Two-Level Program Memory Lock with encryption array
 64 bytes SRAM
 15 Programmable I/O Lines
 One 16-Bit Timer/Counter
 Three Interrupt Sources
 Direct LED Drive Outputs
 On-Chip Analog Comparator
 Low Power Idle and Power Down Modes
Description
The GMS97C1051/L1051 is a high-performance CMOS 8-bit microcontroller with 1Kbytes of programmable
EPROM.
The device is compatible with the industry standard MCS-51
TM instruction set and pinout. The
HYUNDAI MicroElectronics GMS97C1051/L1051 is a powerful microcontroller which provides a highly flexi-
ble and cost effective solution to many embedded control applications.
The GMS97C1051/L1051 provides the
following standard features:
1Kbytes of EPROM, 64 bytes of RAM, 15 I/O lines, 16-bit timer/counter, a three
vector two-level interrupt architecture, a precision analog comparator, on-chip oscillator and clock circuitry.
In
addition, the GMS97C1051/L1051 supports two software selectable power saving modes.
The Idle Mode stops
the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning.
The
Power Down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the
next hardware reset.
Pin Configuration
(T0) P3.4
VCC
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1 (AIN1)
P1.0 (AIN0)
P3.7
RST
P3.0
P3.1
XTAL2
XTAL1
( INT1) P3.3
P3.5
GND
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
PDIP/SOP
( INT0 )P3.2



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