ADC14X250 datasheet(3/69 Pages) TI1

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AGND

VA3.0

CLKIN+

CLKIN-

50:

0.5V

50:

10k:

AGND

VA1.2

Thermal

VA3.0

SCLK

AGND

CSB

VIN+

BP2.5

VIN–

AGND

SO–

VCM

SO+

VA1.2

AGND

VA1.2

Pad

ADC14X250

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SLASE49 – DECEMBER 2015

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5 Pin Configuration and Functions

RHB package

32 Pin WQFN

Top View

Exposed pad on bottom of package

Pin Functions

TYPE OR DIAGRAM

DESCRIPTION

NAME

NO.

AGND

2, 5, 8, 11, 18,

21, 27, 30, 31

Analog ground

Must be connected to a solid ground reference plane

under the device.

BP2.5

Bypass pins

Capacitive bypassing pin for internally regulated 2.5-V

supply

This pin must be decoupled to AGND with a 0.1-

μF

and a 10-µF capacitor located close to the pin.

CLKIN+

Differential device clock input pins

Each pin is internally terminated to a DC bias with a

50-

Ω resistor for a 100-Ω total internal differential

termination. AC coupling is required for coupling the

clock input to these pins if the clock driver cannot meet

the common-mode requirements. Sampling occurs on

the rising edge of the differential signal (CLKIN+)

−

(CLKIN–).

CLKIN–

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