DS2143 datasheet(2/44 Pages) DALLAS

2 / 44 page

DS2143/DS2143Q

2 of 44

can access. These internal registers are used to configure the device and obtain information from the E1

link. The device fully meets al l of the latest E1 specifications, including CCITT G.704, G.706, and

G.732.

1.0 INTRODUCTION

The DS2143 E1 Controller has four main sections: the receive side, the transmit side, the line interface

controller, and the parallel control port. See the Block Diagram. On the receive side, the device will

clock in the serial E1 stream via the RPOS and RNEG pins. The synchronizer will locate the frame and

multiframe patterns and establish their respective positions. This information will be used by the rest of

the receive side circuitry.

The DS2143 is an “off-line” framer, which means that all of the E1 serial stream that goes into the device

will come out of it unchanged. Once the E1 data has been framed to, the signaling data can be extracted.

The two-frame elastic store can either be enabled or bypassed.

The transmit side clocks in the unframed E1 stream at TSER and add in the framing pattern and the

signaling. The line interface control port will update line interface devices that contain a serial port. The

parallel control port contains a multiplexed address and data structure which can be connected to either a

microcontroller or microprocessor.

Reader’s Note:

This data sheet assumes a particular nomenclature of the E1 operating environment. There are 32 8-bit

timeslots in an E1 systems which are number 0 to 31. Timeslot 0 is transmitted first and received first.

These 32 timeslots are also referred to as channels with a numbering scheme of 1 to 32. Timeslot 0 is

identical to channel 1, timeslot 1 is identical to channel 2, and so on. Each timeslot (or channel) is made

up of 8 bits which are numbered 1 to 8. Bit number 1 is the MSB and is transmitted first. Bit number 8 is

the LSB and is transmitted last. Throughout this data sheet, the following abbreviations will be used:

FAS

Frame Alignment Signal

CRC4

Cyclical Redundancy Check

CAS

Channel Associated Signaling

CCS

Common Channel Signaling

Multiframe

Additional bits

International bits

E-bit

CRC4 Error Bits

DS2143 Datenblatt(PDF) 2 Page - Dallas Semiconductor