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ADE3700SX Datenblatt(PDF) 47 Page - STMicroelectronics

Teilenummer ADE3700SX
Bauteilbeschribung  Analog LCD Display Engine for XGA and SXGA Resolutions
PDF  89 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ADE3700SX Datenblatt(HTML) 47 Page - STMicroelectronics

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ADE3700
Output Sequencer
OSQ_VERTEN_DLY_O_L
0x0BCC
R/W
[7:0]
0x0
Delay of the VERT_ENAB signal to the reset of
the horizontal and vertical counters, odd frame
in interlace mode only [15:0]
OSQ_VERTEN_DLY_O_M
0x0BCD
R/W
[7:0]
0x0
OSQ_VERTEN_DLY_O_H
0x0BCE
[7:4]
0x0
Reserved
R/W
[3:0]
0x0
Delay of the VERT_ENAB signal to the reset of
the horizontal and vertical counters, odd frame
in interlace mode only [19:16]
OSQ_VSYNC_SET_L
0x0BCF
R/W
[7:0]
0x0
Vertical count at which VSYNC goes high [7:0]
OSQ_VSYNC_SET_H
0x0BD0
[7:4]
0x0
Reserved
R/W
[3:0]
0x0
vertical count at which VSYNC goes high [11:8]
OSQ_VSYNC_RST_L
0x0BD1
R/W
[7:0]
0x0
Vertical count at which VSYNC goes low [7:0]
OSQ_VSYNC_RST_H
0x0BD2
[7:4]
0x0
Reserved
R/W
[3:0]
0x0
Vertical count at which VSYNC goes low [11:8]
OSQ_HSYNC_SET_L
0x0BD3
R/W
[7:0]
0x0
Horizontal count at which HSYNC goes high
[7:0]
OSQ_HSYNC_SET_H
0x0BD4
[7:4]
0x0
Reserved
R/W
[3:0]
Horizontal count at which HSYNC goes high
[11:8]
OSQ_HSYNC_RST_L
0x0BD5
R/W
[7:0]
0x0
Horizontal count at which HSYNC goes low [7:0]
OSQ_HSYNC_RST_H
0x0BD6
[7:4]
0x0
Reserved
R/W
[3:0]
0x0
Horizontal count at which HSYNC goes low
[11:8]
OSQ_HENAB_SET_L
0x0BD7
R/W
[7:0]
0x0
Horizontal count at which ENAB goes high [7:0]
OSQ_HENAB_SET_H
0x0BD8
[7:4]
0x0
Reserved
R/W
[3:0]
0x0
Horizontal count at which ENAB goes high
[11:8]
value must be greater than 0x01C
OSQ_HENAB_RST_L
0x0BD9
R/W
[7:0]
0x0
Horizontal count at which ENAB goes low [7:0]
OSQ_HENAB_RST_H
0x0BDA
[7:4]
0x0
Reserved
R/W
[3:0]
0x0
Horizontal count at which ENAB goes low [11:8]
OSQ_VENAB_SET_L
0x0BDB
R/W
[7:0]
0x0
Vertical count at which ENAB goes high [7:0]
OSQ_VENAB_SET_H
0x0BDC
[7:4]
0x0
Reserved
R/W
[3:0]
0x0
Vertical count at which ENAB goes high [11:8]
OSQ_VENAB_RST_L
0x0BDD
R/W
[7:0]
0x0
Vertical count at which ENAB goes low [7:0]
OSQ_VENAB_RST_H
0x0BDE
[7:4]
0x0
Reserved
R/W
[3:0]
0x0
Vertical count at which ENAB goes low [11:8]
OSQ_OUT_VCOUNT
0x0BDF
R
[7:0]
0x0
Vertical Counter /16 indicating the current frame
position
Table 16: Output Sequencer Registers (Sheet 2 of 2)
Register Name
Addr
Mode
Bits
Default
Description



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