ADE3700SX datasheet(51/89 Pages) STMICROELECTRONICS

51 / 89 page

51/89

ADE3700

Timing Controller (TCON)

TCON_SRTD_26

0x0B6A

R/W

[7:0]

0x0

Refer to TCON_SRTD_0 for definition.

TCON_SRTD_27

0x0B6B

R/W

[7:0]

0x0

Refer to TCON_SRTD_0 for definition.

TCON_SRTD_28

0x0B6C

R/W

[7:0]

0x0

Refer to TCON_SRTD_0 for definition.

TCON_SRTD_29

0x0B6D

R/W

[7:0]

0x0

Refer to TCON_SRTD_0 for definition.

TCON_SRTD_30

0x0B6E

R/W

[7:0]

0x0

Refer to TCON_SRTD_0 for definition.

TCON_SRTD_31

0x0B6F

R/W

[7:0]

0x0

Refer to TCON_SRTD_0 for definition.

TCON_X_0

0x0B80

[7:6]

Reserved

R/W

[5:0]

0x0

input selection for SRTD_0.A

TCON_X_1

0x0B81

R/W

[7:0]

0x0

input selection for SRTD_0.B

(Refer to Table 18 for definition)

TCON_X_2

0x0B82

R/W

[7:0]

0x0

input selection for SRTD_1.A

(Refer to Table 18 for definition)

TCON_X_3

0x0B83

R/W

[7:0]

0x0

input selection for SRTD_1.B

(Refer to Table 18 for definition)

TCON_X_4

0x0B84

R/W

[7:0]

0x0

input selection for SRTD_2.A

(Refer to Table 18 for definition)

TCON_X_5

0x0B85

R/W

[7:0]

0x0

input selection for SRTD_2.B

(Refer to Table 18 for definition)

TCON_X_6

0x0B86

R/W

[7:0]

0x0

input selection for SRTD_3.A

(Refer to Table 18 for definition)

TCON_X_7

0x0B87

R/W

[7:0]

0x0

input selection for SRTD_3.B

(Refer to Table 18 for definition)

TCON_X_8

0x0B88

R/W

[7:0]

0x0

input selection for SRTD_4.A

(Refer to Table 18 for definition)

TCON_X_9

0x0B89

R/W

[7:0]

0x0

input selection for SRTD_4.B

(Refer to Table 18 for definition)

TCON_X_10

0x0B8A

R/W

[7:0]

0x0

input selection for SRTD_5.A

(Refer to Table 18 for definition)

TCON_X_11

0x0B8B

R/W

[7:0]

0x0

input selection for SRTD_5.B

(Refer to Table 18 for definition)

TCON_X_12

0x0B8C

R/W

[7:0]

0x0

input selection for SRTD_6.A

(Refer to Table 18 for definition)

TCON_X_13

0x0B8D

R/W

[7:0]

0x0

input selection for SRTD_6.B

(Refer to Table 18 for definition)

TCON_X_14

0x0B8E

R/W

[7:0]

0x0

input selection for SRTD_7.A

(Refer to Table 18 for definition)

TCON_X_15

0x0B8F

R/W

[7:0]

0x0

input selection for SRTD_7.B

(Refer to Table 18 for definition)

TCON_X_16

0x0B90

R/W

[7:0]

0x0

input selection for SRTD_8.A

(Refer to Table 18 for definition)

TCON_X_17

0x0B91

R/W

[7:0]

0x0

input selection for SRTD_8.B

(Refer to Table 18 for definition)

Table 17: TCON Registers (Sheet 4 of 7)

Addr.

Mode

Bits

Default

Description

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