SC1200 datasheet(14/60 Pages) TI

14 / 60 page

MSC1200

SBAS289E

www.ti.com

The MSC1200Yx allows the user to uniquely configure the

Flash memory map to meet the needs of their application.

The Flash is programmable down to 2.7V using serial pro-

gramming. Flash endurance is typically 1M Erase/Write cycles.

The part has separate analog and digital supplies, which can

be independently powered from 2.7V to +5.25V. At +3V

operation, the power dissipation for the part is typically less

than 4mW. The MSC1200Yx is packaged in a TQFP-48

package.

The MSC1200Yx is designed for high-resolution measurement

applications in smart transmitters, industrial process control,

weigh scales, chromatography, and portable instrumentation.

ENHANCED 8051 CORE

All instructions in the MSC1200 family perform exactly the same

functions as they would in a standard 8051. The effect on bits,

flags, and registers is the same. However, the timing is different.

The MSC1200 family utilizes an efficient 8051 core which results

in an improved instruction execution speed of between 1.5 and

3 times faster than the original core for the same external clock

speed (4 clock cycles per instruction versus 12 clock cycles per

instruction, as shown in Figure 2). This translates into an effective

throughput improvement of more than 2.5 times, using the same

code and same external clock speed. Therefore, a device

frequency of 33MHz for the MSC1200Yx actually performs at an

equivalent execution speed of 82.5MHz compared to the

DESCRIPTION

The MSC1200Yx is a completely integrated family of mixed-

signal devices incorporating a high-resolution delta-sigma

ADC, 8-bit IDAC, 8-channel multiplexer, burnout detect cur-

rent sources, selectable buffered input, offset DAC, program-

mable gain amplifier (PGA), temperature sensor, voltage

reference, 8-bit microcontroller, Flash Program Memory, Flash

Data Memory, and Data SRAM, as shown in Figure 1.

On-chip peripherals include an additional 32-bit accumulator,

basic SPI, basic I2C, USART, multiple digital input/output

ports, watchdog timer, low-voltage detect, on-chip power-on

reset, brownout reset, timer/counters, system clock divider,

PLL, on-chip oscillator, and external interrupts.

The device accepts low-level differential or single-ended

signals directly from a transducer. The ADC provides 24 bits

of resolution and 24 bits of no-missing-code performance

using a Sinc3 filter with a programmable sample rate. The

ADC also has a selectable filter that allows for high-resolu-

tion single-cycle conversion.

The microcontroller core is 8051 instruction set compatible. The

microcontroller core is an optimized 8051 core that executes up

to three times faster than the standard 8051 core, given the

same clock source. This makes it possible to run the device at

a lower external clock frequency and achieve the same perfor-

mance at lower power than the standard 8051 core.

ACC

MUX

REF

Modulator

4K or 8K

FLASH

128 Bytes

SRAM

Digital

Filter

8051

SFR

ALVD

DBOR

System

Clock

Divider

POR

PORT1

WDT

Alternate

Functions

Timers/

Counters

PLL

PORT3

DIN

DOUT

EXT (4)

PROG

USART

EXT (2)

SCK/SCL/CLKS

On-Chip

Oscillator

8-Bit

Offset DAC

8-Bit IDAC

Burnout

Detect

AIN0

AIN1

AIN2

AIN3

AIN4

AIN5

AIN6

AIN7

AINCOM

IDAC

AGND

REFOUT/REFIN+ REFIN–

DGND

XIN XOUT

Temperature

Sensor

Burnout

Detect

RST

CAP

220pF Ceramic

AGND

BUFFER

PGA

NOTE (1) REF IN

− must be tied to AGND when using internal V

REF.

(1)

FIGURE 1. Block Diagram.

FIGURE 2. Instruction Cycle Timing.

CLK

instr_cycle

cpu_cycle

n + 1

n + 2

SC1200 Datenblatt(PDF) 14 Page - Texas Instruments

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