USB84604 datasheet(47/61 Pages) MICROCHIP

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 2014-2016 Microchip Technology Inc.

DS60001295C-page 47

USB84604

9.6

AC Specifications

This section details the various AC timing specifications of the device.

9.6.1

POWER-ON CONFIGURATION STRAP VALID TIMING

Figure 9-3 illustrates the configuration strap timing requirements, in relation to power-on, for applications where

RESET_N is not used at power-on. The operational levels (Vopp) for the external power supplies are detailed in Section

9.2, "Operating Conditions**," on page 41.

ICLK Type Buffer

(XTAL1/REFCLK Input)

Low Input Level

High Input Level

VIL

VIH

-0.3

0.8

0.35

3.6

Note 10

Note 9: O6, OD6: The pad strength can be increased to 12 mA for SPI Bridging applications.

Note 10: XTAL2 can optionally be driven from a 24 MHz single-ended clock oscillator (REFCLK).

Note:

For RESET_N configuration strap timing requirements, refer to Section 9.6.2, "Reset and Configuration

Strap Timing," on page 48.

FIGURE 9-3:

POWER-ON CONFIGURATION STRAP VALID TIMING

TABLE 9-9:

POWER-ON CONFIGURATION STRAP VALID TIMING

Symbol

Description

Min

Typ

Max

Units

tcsh

Configuration strap hold after external power supplies at

operational levels

1ms

TABLE 9-8:

DC ELECTRICAL CHARACTERISTICS (CONTINUED)

Parameter

Symbol

Min

Typ

Max

Units

Notes

All External

Power Supplies

Vopp

Configuration

Straps

tcsh

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