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USB84604 Datenblatt(PDF) 8 Page - Microchip Technology |
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USB84604 Datenblatt(HTML) 8 Page - Microchip Technology |
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8 / 61 page ![]() USB84604 DS60001295C-page 8 2014-2016 Microchip Technology Inc. 3.0 PIN DESCRIPTIONS This section provides a detailed description of each pin. The signals are arranged in functional groups according to their associated interface. The “_N” symbol in the signal name indicates that the active, or asserted, state occurs when the signal is at a low voltage level. For example, RESET_N indicates that the reset signal is active low. When “_N” is not present after the signal name, the signal is asserted at the high voltage level. The terms assertion and negation are used exclusively. This is done to avoid confusion when working with a mixture of “active low” and “active high” signals. The term assert, or assertion, indicates that a signal is active, independent of whether that level is represented by a high or low voltage. The term negate, or negation, indicates that a signal is inac- tive. Note: The buffer type for each signal is indicated in the BUFFER TYPE column of Table 3-1. A description of the buffer types is provided in Section 3.2. Note: Compatibility with the Microchip UCS8100x family of USB port power controllers requires the UCS8100x be connected on Port 1 of the USB84604. Additionally, both PRTPWR1 and OCS1_N must be pulled high at Power-On Reset (POR). TABLE 3-1: PIN DESCRIPTIONS Num Pins Name Symbol Buffer Type Description USB/HSIC Interfaces 1 Upstream USB D+ (Flex Port 0) FLEX_USBUP_DP AIO Upstream USB Port 0 D+ data signal. See Note 1. Note: The upstream Port 0 signals can be optionally swapped with the down- stream Port 1 signals. Port 0 D+ Disable Configuration Strap PRT_DIS_P0 IS This strap is used in conjunction with PRT_DIS_M0 to disable USB Port 0. 0 = Port 0 D+ Enabled 1 = Port 0 D+ Disabled Note: Both PRT_DIS_P0 and PRT_DIS_M0 must be tied to VDD33 at reset to place Port 0 into HSIC mode. See Note 2 for more information on configuration straps. |
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