LMC1983CIV datasheet(7/14 Pages) NSC

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General Information (Continued)

Application Information

INPUT SELECTOR

The LMC1983’s input selector and mode control are shown

Figure 2. The input selector selects one of three stereo

signal sources or a mute function with typical attenuation of

100 dB. The selected signals are then sent to a mode control

matrix. As shown in

Table 1, the matrix provides normal ste-

reo or can direct any given channel to both LEFT or RIGHT

SELECT OUTPUTs. The third matrix mode is normal stereo.

The control matrix output is buffered and appears on each

channel’s respective SELECT OUT pin (7, 22). Switching

noise is kept to a minimum when mute is selected by using

a50 k

Ω bias resistor.

Noise performance is optimized through the use of emitter

followers in the mode control matrix’s output. Internal 50 k

Ω

resistors are connected to each input selector pin to provide

the proper bias point for the emitter follower buffers. Each in-

ternal 50 k

Ω bias resistor is connected to a common

half-supply (V

+/2) source. This produces a voltage at pins 7

and 22 (SELECT OUT) that is 1.4V below V

+/2 (typically

3.1V with V

+ = 9V). Since a DC voltage is present at the in-

put pins (4, 5, 6, 23, 24, and 25), input signals should be AC

coupled through a 1 µF capacitor.

The output signal at pins 7 and 22 can be used to drive ex-

teral audio processing circuits such as noise reduction

(LM1894–DNR or Dolby) or graphic equalizers (LMC835). It

is important that if any noise reduction is used it be placed

ahead of any tone controls or equalizers in the external cir-

cuit path to preserve the frequency spectrum of the selected

input signal. Otherwise, any frequency equalization could

prevent the proper operation of the noise reduction circuit. If

no external processor is used, a capacitor should be used to

couple the SELECT OUT signals directly to pins 8 and 21,

respectively.

MINIMUM LOAD IMPEDANCE

The LMC1983 employs emitter-followers to buffer the se-

lected stereo channels. The buffered signals are available at

pins 7 and 22 (SELECT OUT). The SELECT OUT buffers op-

erate with a typical bias current of 1 mA.

The Electrical Specifications table lists a maximum input sig-

nal of 2.0 V

rms (2.8 Vpeak) for 1% THD at the SELECT OUT

pins. This distortion level is achieved when the minimum AC

load impedance seen by the SELECT OUT pins is 2.5 k

Ω

(2.5V/1 mA). Using lower load impedances results in clipping

DS011279-3

FIGURE 1. Typical Application

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