LMC1983CIV datasheet(8/14 Pages) NSC

Teilenummer	LMC1983CIV

Bauteilbeschribung	Digitally-Controlled Stereo Tone and Volume Circuit with Three Selectable Stereo Inputs

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Hersteller	NSC [National Semiconductor (TI)]

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Application Information (Continued)

at lower output levels. If the load impedance is DC-coupled,

an increased quiescent current can flow. Latch-up may occur

if the total emitter current exceeds 5 mA. Thus, maximum

output voltage can be increased and much lower distortion

levels can be achieved using load impedances of at least

25 k

Ω.

INPUT IMPEDANCE

The input impedance of pins 4, 5, 6, 23, 24 and 25 is defined

by internal bias resistors and is typically 50 k

Ω.

The SELECT IN pins have an input impedance that varies

with the BASS and TREBLE control settings. The input im-

pedance is 100 k

Ω at DC and 19 kΩ at 1 kHz when the con-

trols are set at 0 dB. Minimum input impedance of 30.4 k

Ω at

DC and 16 k

Ω at 1 kHz occurs when maximum boost is se-

lected. At 10 kHz the minimum input impedance, with the

tone controls flat, is 6.8 k

Ω and, with the tone controls at

maximum boost, is 2.5 k

Ω.

DS011279-4

FIGURE 2. Input and Mode Select Circuitry

LMC1983CIV Datenblatt(PDF) 8 Page - National Semiconductor (TI)