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PE42510AMLI-Z Datenblatt(PDF) 3 Page - Peregrine Semiconductor |
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PE42510AMLI-Z Datenblatt(HTML) 3 Page - Peregrine Semiconductor |
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3 / 7 page ![]() Product Specification PE42510A Page 3 of 7 Document No. 70-0266-03 │ www.psemi.com ©2008-2012 Peregrine Semiconductor Corp. All rights reserved. Evaluation Kit The PE42510A Evaluation Kit board was designed to ease customer evaluation of the PE42510A RF switch. DC power is supplied through J10, with VDD on pin 9, and GND on the entire lower row of even numbered pins. To evaluate a switch path, add or remove jumpers on CTRL/V1 (pin 3) using Table 5 (adding a jumper pulls the CMOS control pin low and removing it allows the on-board pull-up resistor to set the CMOS control pin high). J10 pins 1, 11, and 13 are N/C. The RF common port (RFC) is connected through a 50Ω transmission line via the top SMA connector, J1. RF1 and RF2 paths are also connected through 50 Ω transmission lines via SMA connectors. A 50 Ω through transmission line is available via SMA connectors J8 and J9. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. An open- ended 50 Ω transmission line is also provided at J7 for calibration if needed. Figure 4. Evaluation Board Layouts Figure 5. Evaluation Board Schematic 102-0383-02 101-0314-02 |
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