Production Data

WM8152

w

PD, Rev 4.3, August 2008

17

OUTPUT DATA FORMAT

The digital data output from the ADC is available to the user in 4-bit wide multiplexed. Latency of

valid output data with respect to VSMP is programmable by writing to control bits DEL[1:0]. The

latency for each mode is shown in the Operating Mode Timing Diagrams section.

Figure 13 shows the output data formats for Mode 1 and 3 – 6. Figure 14 shows the output data

formats for Mode 2. Table 3 summarises the output data obtained for each format.

MCLK

4+4+4+4-BIT

OUTPUT

AB

C

D

MCLK

4+4+4+4-BIT

OUTPUT

D

AB

C D

AB

Figure 13 Output Data Formats

(Modes 1, 3, 4)

Figure 14 Output Data Formats

(Mode 2)

OUTPUT

FORMAT

OUTPUT

PINS

OUTPUT

4+4+4+4-bit

(nibble)

OP[3:0]

A = d15, d14, d13, d12

B = d11, d10, d9, d8

C = d7, d6, d5, d4

D = d3, d2, d1, d0

Table 3 Details of Output Data Shown in Figure 13 and Figure 14