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LT1952

1952f

APPLICATIO S I FOR ATIO

Example calculation for (2)

For RT = 35.7k, RB = 100k, VREF = 2.5V,

RDELAY = 40k, fOSC = 200kHz and SD_VSEC = 1.32V,

this gives SS_MAXDC(DC) = 1.84V, tDELAY = 40ns

and k = 1

Maximum Duty Cycle Clamp

= 1 • 0.522(1.84/1.32) – (40ns • 200kHz)

= 0.728 – 0.008 = 0.72 (Duty Cycle Clamp = 72%)

Note 1: To achieve the same maximum duty cycle clamp

at 100kHz as calculated for 200kHz, the SS_MAXDC

voltage should be reprogrammed by,

SS_MAXDC(DC) (100kHz)

= SS_MAXDC(DC) (200kHz) • k (200kHz)/k (100kHz)

= 1.84 • 1.0/1.055 = 1.74V (k = 1.055 for 100kHz)

The second order effect of tDELAY should also be consid-

ered for final adjustment of SS_MAXDC(DC).

Note 2 : To achieve the same maximum duty cycle clamp

while synchronizing to an external clock at the SYNC pin,

the SS_MAXDC voltage should be re-programmed as,

SS_MAXDC (DC) (fsync)

= SS_MAXDC (DC) (200kHz) • [(fosc/fsync) +

0.09(fosc/200kHz)0.6]

For SS_MAXDC (DC) (200kHz) = 1.84V for 72%

duty cycle

SS_MAXDC (DC) (fsync = 250kHz) for 72%

duty cycle

= 1.84 • [(200kHz/250kHz) + 0.09(1)0.6]

= 1.638V

Programming Soft-Start Timing

The LT1952 has built-in soft-start capability to provide low

stress controlled startup from a list of fault conditions that

can occur in the application (see Figure 1 and Figure 10).

The LT1952 provides true PWM soft-start by using the

SS_MAXDC pin to control soft-start timing. The propor-

tional relationship between SS_MAXDC voltage and switch

maximum duty cycle clamp allows the SS_MAXDC pin to

slowly ramp output voltage by ramping the maximum

switch duty cycle clamp — until switch duty cycle clamp

seamlessly meets the natural duty cycle of the converter.

Figure 10. Soft-Start Timing

A capacitor CSS on the SS_MAXDC pin and the resistor

divider from VREF used to program maximum switch duty

cycle clamp, determine soft-start timing (Figure 11).

A soft-start event is triggered for the following faults:

(1) VIN < 8.75V, or

(2) SD_VSEC < 1.32V (UVLO), or

(3) OC > 100mV (over-current condition)

When a soft-start event is triggered, switching at SOUT

and OUT is stopped immediately. A soft-start latch is set

and SS_MAXDC pin is discharged. The SS_MAXDC pin

can only recharge when the soft-start latch has been reset.

Note: A soft-start event caused by (1) or (2) above, also

causes VREF to be disabled and to fall to ground.

SOFT-START

EVENT TRIGGERED

TIMING (A): SOFT START FAULT REMOVED

BEFORE SS_MAXDC FALLS TO 0.45V

SS_MAXDC

0.8V (ACTIVE THRESHOLD)

0.45V (RESET THRESHOLD)

1952 F10

TIMING (B): SOFT-START FAULT REMOVED

AFTER SS_MAXDC FALLS PAST 0.45V

SS_MAXDC

0.8V (ACTIVE THRESHOLD)

0.45V (RESET THRESHOLD)

0.2V

Figure 11. Programming Soft-Start Timing

SS_MAXDC CHARGING MODEL

SS_MAXDC(DC) = VREF [RB/(RT + RB)]

RCHARGE = [RT • RB/(RT + RB)]

SS_MAXDC(DC)

1952 F11

SS_MAXDC

LT1952

RCHARGE

SS_MAXDC

VREF

LT1952

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