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AD9136-EBZ Datenblatt(PDF) 21 Page - Analog Devices |
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AD9136-EBZ Datenblatt(HTML) 21 Page - Analog Devices |
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21 / 117 page ![]() Data Sheet AD9135/AD9136 Rev. C | Page 21 of 117 Figure 34. Total Power Consumption vs. fDAC over Interpolation, 8 SERDES Lanes Enabled, 2 DACs Enabled, Digital Gain, Inverse Sinc and DAC PLL Disabled Figure 35. Power Consumption vs. fDAC over Digital Functions Figure 36. SVDD12 Current vs. Lane Rate over Number of SERDES Lanes and Supply Voltage Setting Figure 37. DVDD12, CVDD12, PVDD12, and AVDD33 Supply Currents vs. fDAC over Supply Voltage Setting, 2 DACs Enabled 1500 1400 1300 1200 1100 1000 900 500 2500 2000 1500 1000 fDAC (MHz) 1× 2× 4× 120 100 80 60 40 20 0 200 1600 1400 1200 1000 800 600 400 fDAC (MHz) PLL ( fDAC/fREF RATIO:4) DIGITAL GAIN INVERSE SINC 700 100 200 300 400 500 600 1 8 7 6 5 4 3 2 LANE RATE (Gbps) 2 LANES 4 LANES 8 LANES 1.2V SVDD12 SUPPLY 1.3V SVDD12 SUPPLY 250 0 50 100 150 200 400 1600 1400 1200 100 800 600 fDAC (MHz) PVDD12 AVDD33 CVDD12 DVDD12 1.2V SUPPLY 3.3V SUPPLY 1.3V SUPPLY |
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