ELD5016 datasheet(33/38 Pages) EMC

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eLD5016

8-Bit Microcontroller

Product Specification (V1.0) 2.16.2017

 29

(This specification is subject to change without prior notice)

5.7 Instruction Set

Instruction set has the following features:

(1) Every bit of any register can be set, cleared, or tested directly.

(2) The I/O register can be regarded as general register. That is, the same instruction

can operate on I/O register.

The symbol "R" represents a register designator which specifies which one of the 64

registers (including operational registers and general purpose registers) is to be utilized

by the instruction. Bits 6 and 7 in R4 determine the selected register bank. "b''

represents a bit field designator which selects the number of the bit, located in the

constant or literal value.

Mnemonic

Operation

Status Affected

NOP

No Operation

None

DAA

Decimal Adjust A

CONTW

 CONT

None

SLEP

 WDT, Stop oscillator

T, P

WDTC

 WDT

T, P

IOW

 IOCR

None

ENI

Enable Interrupt

None

DISI

Disable Interrupt

None

RET

[Top of Stack]

 PC

None

RETI

[Top of Stack]

 PC

Enable Interrupt

None

CONTR

CONT

 A

None

IOR

IOCR

 A

None

TBL

R2+A

 R2 Bits 9,10 do not clear

Z, C, DC

MOV

R,A

 R

None

CLRA

 A

CLR

 R

SUB

A,R

R-A

 A

Z, C, DC

SUB

R,A

R-A

 R

Z, C, DC

DECA

R-1

 A

DEC

R-1

 R

A,R

 VR  A

R,A

 VR  R

AND

A,R

A & R

 A

AND

R,A

A & R

 R

XOR

A,R

 R  A

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