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SB710 Datenblatt(PDF) 3 Page - Advanced Micro Devices |
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SB710 Datenblatt(HTML) 3 Page - Advanced Micro Devices |
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3 / 88 page ![]() Revision History Date Revision Description Nov, 2009 1.60 Updated Figure 3-1, “SB710 Power Up/Down Sequence”: Corrected SLP_S5#/SLP_S3# timing diagram. Aug, 2009 1.40 Updated Section 1.1, “Features of the SB710”: Added support for SATA hot plug. Updated Figure 12-1, “SB710 FCBGA Package Outline” with a picture of better quality. Updated Table 9-5, “RTC X1 Clock AC Specifications”: Removed cycle-to- cycle jitter requirement. Updated Section 7.13, “SMBus Interface/GPOC”: Noted that SCL and SDA pins are OD when configured as SMBus pins. July, 2009 1.25 Updated Table 9-5, “RTC X1 Clock AC Specifications”: Corrected unit for T62 to T65 to µS. June, 2009 1.10 First release of the public version. |
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