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AT25SF641B Datenblatt(PDF) 22 Page - Dialog Semiconductor

Teilenummer AT25SF641B
Bauteilbeschribung  64-Mbit SPI Serial Flash Memory with Dual-I/O and Quad-I/O Support
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AT25SF641B
DS-AT25SF641B–191D–12-2020
8.
Program and Erase Commands
8.1
Byte/Page Program (02h)
The Byte/Page Program command allows one to 256 bytes of data to be programmed into previously erased
memory locations. An erased memory location is one that has all eight bits set to the logical “1” state (a byte value
of FFh). Before a Byte/Page Program command can be started, the Write Enable command must have been
issued to the device (see “Write Enable (06h)”, on page 27) to set the Write Enable Latch (WEL) bit of the Status
Register to a logical “1” state.
To perform a Byte/Page Program command, an opcode of 02h must be clocked into the device, followed by the
three address bytes denoting the first byte location of the memory array to begin programming at. After the address
bytes have been clocked in, data can then be clocked into the device and is stored in an internal buffer.
If the starting memory address denoted by A23-A0 does not fall on an even 256-byte page boundary (A7-A0 are
not all 0), special circumstances regarding which memory locations to be programmed apply. In this situation, any
data that is sent to the device that goes beyond the end of the page wraps around back to the beginning of the
same page. For example, if the starting address denoted by A23-A0 is 0000FEh, and three bytes of data are sent
to the device, then the first two bytes of data are programmed at addresses 0000FEh and 0000FFh, and the last
byte of data is programmed at address 000000h. The remaining bytes in the page (addresses 000001h through
0000FDh) are not programmed and remain in the erased state (FFh). Furthermore, if more than 256 bytes of data
are sent to the device, only the last 256 bytes sent are latched into the internal buffer.
When the CS pin is deasserted, the device takes the data stored in the internal buffer and programs it into the
appropriate memory array locations based on the starting address specified by A23-A0 and the number of data
bytes sent to the device. If fewer than 256 bytes of data were sent to the device, the remaining bytes within the
page are not programmed and remain in the erased state (FFh). The programming of the data bytes is internally
self-timed and, if only programming a single byte, must take place in a time of tPP or tBP.
The three address bytes and at least one complete data byte must be clocked into the device before the CS pin is
deasserted, and the CS pin must be deasserted on even byte boundaries (multiples of eight bits); otherwise, the
device aborts the operation and no data is programmed into the memory array. Also, if the memory is in the
protected state, the Byte/Page Program command is not executed, and the device returns to the idle state once the
CS pin has been deasserted. The WEL bit in the Status Register is reset to the logical “0” state if: the program
cycle aborts due to an incomplete address being sent, an incomplete byte of data is sent, the CS pin is deasserted
on uneven byte boundaries, or the memory location to be programmed is protected.
While the device is programming, the Status Register can be read and indicates that the device is busy. For faster
throughput, it is recommended that the Status Register be polled, rather than waiting the tBP or tPP time to
determine if the data bytes have finished programming. At some point before the program cycle completes, the
WEL bit in the Status Register is reset to the logical “0” state.
Figure 8-1. Byte Program
SCK
CS
SI
SO
MSB
MSB
23
1
0
00000010
67
5
410 11
9
812
39
37 38
33
36
35
34
31 32
29 30
OPCODE
HIGH-IMPEDANCE
AAAA
AAA
AA
MSB
DDDDDDDD
ADDRESS BITS A23-A0
DATA IN



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