ADP5350ACPZ-1-R7 datasheet(34/63 Pages) AD

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ADP5350

Data Sheet

Rev. B | Page 34 of 63

voltage is provided from the system voltage. The LDO output

voltage is set by the factory fuse or I2C.

The LDO regulator provides a high power supply rejection ratio

(PSRR), low output noise, and excellent line and load transient

response with small 1 µF ceramic input and output capacitors.

The LDO1, LDO2, and LDO3 fixed output voltages are set by

the factory fuse and include the following options: 1.0 V, 1.1 V,

1.2 V, 1.3 V, 1.4 V, 1.5 V, 1.8 V, 2.1 V, 2.3 V, 2.5 V, 2.85 V, 3.0 V,

3.15 V, 3.3 V, 3.6 V, and 4.2 V.

Load Switch Mode

All LDO regulators can be configured as a load switch via the

I2C. The load switch allows power domain isolation and helps to

extend the battery life.

LDO Output Discharge

Each LDO has an output discharge feature that can be selected

by the I2C. When the output discharge feature is enabled, the

selected LDO output connects the internal 500 Ω load to

ground and pulls down the output voltage quickly when the

LDO channel is disabled.

PGOOD Indicator of LDO1 Output

The ADP5350 PGOOD pin can mask various power-good

channels, including LDO1, the boost regulator, and VVBUSx by

setting Register 0x37, Bit 0.

When the PGOOD pin masks the LDO1 power-good output and

enables LDO1, the PGOOD pin indicates the LDO1 output voltage

power-good signal, and asserts high when the VOUT1 pin

voltage reaches up to 90% of the typical voltage with a typical

2 ms deglitch time. The PGOOD signal asserts low when the

VOUT1 pin voltage drops to 86.5% of the typical voltage.

The default setting of the PG1_LDO1_MASK is a factory fuse

trim that is programmable. The LDO1 power-good status can

be read via the I2C interface, using Register 0x36, Bit 0.

THERMAL MANAGEMENT

Isothermal Charging and Thermal Early Warning

To assist with the thermal management of the ADP5350

charger, the battery charger provides an isothermal charging

function. As the on-chip power dissipation and die temperature

increase, the ADP5350 charger monitors the die temperature

and limits the output current when the temperature reaches

TSD_W. The die temperature is maintained at TSD_W through the

control of the charging current into the battery. A reduction in

power dissipation or ambient temperature may allow the

charging current to return to its original value, and the die

temperature subsequently drops below TSD_W. During

isothermal charging, the THERM_LIM flag is set to high.

The early warning bit is set if TSD_W is exceeded. This warning

bit allows the system to accommodate power consumption

before thermal shutdown occurs.

Thermal Shutdown

The ADP5350 switching charger features a thermal shutdown

threshold detector. If the die temperature exceeds TSD, the

ADP5350 charger is disabled, and the TSD_140 bit is set. The

ADP5350 charger can be reenabled when the die temperature

drops below the TSD falling limit and the TSD_140 bit is reset.

To reset the TSD_140 bit, write to the I2C Fault Register 0x0A

or cycle the power.

Fault Recovery

Before performing the following operation, it is important to

ensure that the cause of the fault is rectified.

To reset the fault bits in the CHARGER_FAULT register, cycle

the power on VBUSx or write the corresponding I2C bit high.

ADP5350ACPZ-1-R7 Datenblatt(PDF) 34 Page - Analog Devices

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