ADP5350ACPZ-1-R7 datasheet(42/63 Pages) AD

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ADP5350

Data Sheet

Rev. B | Page 42 of 63

Table 25. CHARGER_TIMER_SETTING, Register Address 0x06 Bit Descriptions

Bit No.

Mnemonic

Access

Default

Description

Not used

Not used.

EN_TEND

R/W

When low, this bit disables the charge complete timer (tEND), and a

31 ms deglitch timer remains on this function.

EN_CHG_TIMER

R/W

When high, the trickle/fast charge timer is enabled.

[4:3]

CHG_TMR_PERIOD

R/W

Trickle/fast charge timer period.

00 = 15 minutes/150 minutes.

01 = 30 minutes/300 minutes.

10 = 45 minutes/450 minutes.

11 = 60 minutes/600 minutes.

EN_WD

R/W

0 = the watchdog timer is disabled even when VBSNS exceeds VTRK_DEAD.

1 = the watchdog timer safety timer is enabled.

WD_PERIOD

R/W

Watchdog safety timer period.

0 = 32 sec to 40 min.

1 = 64 sec to 40 min.

RESET_WD

When this bit is high, the watchdog safety timer resets. This bit is

reset automatically.

Table 26. CHARGER_FUNCTION_SETTING1, Register Address 0x07 Bit Descriptions

Bit No.

Mnemonic

Access

Default

Description

EN_JEITA

R/W

When low, this bit disables the JEITA Li-Ion temperature battery

charging specification.

DIS_IPK_SD

R/W

When high, this bit disables the automatic shutdown of the device if

four peak inductor current limits are reached in succession. In

addition, when this bit is high, it only flags the IPK_STAT status bit.

EN_BMON

R/W

When this bit is high, the battery monitor is enabled even when the

voltage at the VBUSx pins is below VVBUSOK_FALL.

EN_THR

R/W

When this bit is high, the THR current source is enabled even when

the voltage at the VBUSx pins is below VVBUSOK_FALL.

EN_DCDC

R/W

When this bit is low, the dc-to-dc converter is disabled. When this bit

is high, the dc-to-dc converter is enabled.

EN_EOC

R/W

When this bit is high, end of charge is allowed.

EN_TRK

R/W

When this bit is low, trickle charger is disabled and the dc-to-dc

converter is enabled.

EN_CHG

R/W

Factory setting

When this bit is low, charging is disabled. When this bit is high and

EN_DCDC = high, charging is enabled.

Table 27. CHARGER_STATUS1, Register Address 0x08 Bit Descriptions

Bit No.

Mnemonic

Access

Default

Description

VBUS_OV

Not applicable

When high, this bit indicates that the voltage at the VBUSx pins

exceeds VVBUS_OV.

Not used

Not used.

VBUS_ILIM

Not applicable

When high, this bit indicates that the current into a VBUSx pin is

limited by the high voltage blocking FET and the charger is not

running at the full programmed ICHG.

THERM_LIM

Not applicable

When high, this bit indicates that the charger is not running at the

full programmed ICHG but is limited by the die temperature.

CHDONE

Not applicable

When high, this bit indicates the end of charge cycle is reached. This

bit latches on, in that it does not reset to low when the VRCH

threshold is breached.

ADP5350ACPZ-1-R7 Datenblatt(PDF) 42 Page - Analog Devices

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