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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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ADA4099-1BUJZ-R5 Datenblatt(PDF) 5 Page - Analog Devices |
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ADA4099-1BUJZ-R5 Datenblatt(HTML) 5 Page - Analog Devices |
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5 / 34 page  Data Sheet ADA4099-1/ADA4099-2 SPECIFICATIONS analog.com Rev. A | 5 of 34 Table 1. Parameter Test Conditions/Comments B Grade H Grade Unit Min Typ Max Min Typ Max PSRR VSY = 3.15 V to ±25 V 123 136 123 136 dB TMIN < TA < TMAX 119 120 dB THERMAL SHUTDOWN6 Temperature Junction temperature (TJ) 175 175 °C Hysteresis 20 20 °C Operating Temperature Ambient temperature (TA) −40 +125 −55 +150 °C 1 Thermoelectric voltages present in the high speed production test limit the measurement accuracy of this parameter. The limits shown in Table 1 are determined by test capability and are not necessarily indicative of actual device performance. 2 Offset voltage drift is guaranteed through lab characterization and is not production tested. 3 Test accuracy is limited by high speed production test equipment repeatability. Bench measurements indicate that the input offset current in Over-The-Top configuration is typically controlled to under 250 nA at +25°C and 1000 nA over the −55°C < TA < +150°C temperature range. 4 VOD is +30 mV for VOUT high and −30 mV for VOUT low. 5 Maximum operating voltage is limited by the time-dependent dielectric breakdown (TDDB) of on-chip capacitor oxides. The amplifier tolerates temporary transient overshoot up to the specified absolute maximum rating, but the dc supply voltage must be limited to the maximum operating voltage. 6 Thermal shutdown is lab characterized only and is not tested in production. ±15 V SUPPLY VCM = 0 V, SHDN pin (ADA4099-1) and SHDNx pins (ADA4099-2 10-lead LFCSP) are open, RL = 499 kΩ to ground, and TA = 25°C, unless otherwise noted. Table 2. Parameter Test Conditions/Comments B Grade H Grade Unit Min Typ Max Min Typ Max DC PERFORMANCE Input Offset Voltage (VOS)1 ±12 ±40 ±12 ±40 µV TMIN < TA < TMAX ±95 ±90 µV VSY = ±25 V ±15 ±40 ±15 ±40 µV TMIN < TA < TMAX ±105 ±90 µV Input Offset Voltage Drift2 TMIN < TA < TMAX ±0.1 ±0.4 ±0.1 ±0.9 µV/°C Input Bias Current ±4 ±10 ±4 ±10 nA TMIN < TA < TMAX ±25 ±60 nA VSY = ±25 V ±4 ±10 ±4 ±10 nA TMIN < TA < TMAX ±35 ±100 nA Input Offset Current ±2 ±5 ±2 ±5 nA TMIN < TA < TMAX ±15 ±30 nA VSY = ±25 V ±4 ±5 ±4 ±5 nA TMIN < TA < TMAX ±20 ±35 nA CMRR VCM = −14.75 V to +13.25 V 118 130 118 130 dB TMIN < TA < TMAX 112 114 dB VCM = −15.1 V to +13.25 V 115 126 115 126 dB TMIN < TA < TMAX 105 101 dB VCM = −15.1 V to +55 V 117 126 117 126 dB TMIN < TA < TMAX 110 107 dB Common-Mode Input Range Guaranteed by CMRR tests −15.1 +55 −15.1 +55 V |
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