ADA4099-1BUJZ-R5 datasheet(10/34 Pages) AD

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Data Sheet

ADA4099-1/ADA4099-2

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

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Rev. A | 10 of 34

Figure 4. Pin Configuration for ADA4099-1 6-Lead TSOT

Table 6. Pin Function Descriptions for ADA4099-1 6-Lead TSOT

Pin No. Mnemonic Description

VOUT

Amplifier Output.

−VS

Negative Power Supply. In single-supply applications, this pin is normally soldered to a low impedance ground plane. In split supply applications,

bypass this pin with a capacitance of at least 0.1 μF to a low impedance ground plane, as close to the pin as possible.

+IN

Noninverting Input of the Amplifier.

−IN

Inverting Input of the Amplifier.

SHDN

Op Amp Shutdown. The threshold for shutdown is approximately 1 V above the negative supply. If this pin is not connected or hard tied to −VS, the

amplifier is active. If asserted high (VSHDN > −VS + 1.5 V), the amplifier is placed in a shutdown state, and the output of the amplifier goes to a high

impedance state. If this pin is left unconnected, it is recommended to connect a small capacitor of 1 nF between SHDN and −VS to prevent signals

from −IN from capacitively coupling to the SHDN pin.

+VS

Positive Power Supply. Bypass this pin with a capacitance of at least 0.1 μF to a low impedance ground plane, as close to the pin as possible.

Figure 5. Pin Configuration for ADA4099-2 8-Lead SOIC_N and 8-Lead MSOP

Table 7. Pin Function Descriptions for ADA4099-2 8-Lead SOIC_N and 8-Lead MSOP

Pin No. Mnemonic Description

VOUT1

Amplifier Output, Channel 1.

−IN1

Inverting Input of the Amplifier, Channel 1.

+IN1

Noninverting Input of the Amplifier, Channel 1.

−VS

Negative Power Supply. In single-supply applications, this pin is normally soldered to a low impedance ground plane. In split supply applications,

bypass this pin with a capacitance of at least 0.1 μF to a low impedance ground plane, as close to the pin as possible.

+IN2

Inverting Input of the Amplifier, Channel 2.

−IN2

Noninverting Input of the Amplifier, Channel 2.

VOUT2

Amplifier Output, Channel 2.

+VS

Positive Power Supply. Bypass this pin with a capacitance of at least 0.1 μF to a low impedance ground plane, as close to the pin as possible.

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