S80KS2563 datasheet(20/53 Pages) INFINEON

Teilenummer	S80KS2563

Bauteilbeschribung	256 Mb: HYPERRAM??self-refresh dynamic RAM (DRAM) with Octal xSPI interface 1.8 V

PDF	53 Pages

Scroll/Zoom	100%

Hersteller	INFINEON [Infineon Technologies AG]

Direct Link	http://www.infineon.com

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Datasheet

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002-31339 Rev. *C

2021-09-27

256 Mb: HYPERRAM™ self-refresh dynamic RAM (DRAM) with Octal xSPI interface

1.8 V

xSPI (Octal) transaction details

4.13

Data placement during register READ/WRITE transactions

Data placement during register read/write is Big Endian.

Table 5

Data placement during register READ/WRITE transactions

Address

space

Byte

order Byte position

Worddata

bit

Bit order

Big-

endian

When data is being accessed in register space:

During a read transaction on the xSPI (Octal) two bytes are

transferred on each clock cycle. The upper order byte A

(Word[15:8]) is transferred between the rising and falling

edges of RWDS (edge-aligned). The lower order byte B

(Word[7:0]) is transferred between the falling and rising

edges of RWDS.

During a write, the upper order byte A (Word[15:8]) is trans-

ferred on the CK rising edge and the lower order byte B

(Word[7:0]) is transferred on the CK falling edge.

So, register space is always read and written in Big-endian

order because registers have device dependent fixed bit

location and meaning definitions.

S80KS2563 Datenblatt(PDF) 20 Page - Infineon Technologies AG