48LM01 datasheet(28/40 Pages) MICROCHIP

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DS20006008C-page 28

48L512/48LM01

12.0 HIBERNATION

The 48LXXX devices include a very low-power Hiber-

nation mode. The Hibernation mode is initiated by

sending the Hibernate instruction. Once received, the

CS pin returns high, the device performs a store oper-

ation if the array has been modified since the last store

or recall, and then the device enters a low-power state.

Exiting the Hibernation state requires either a power

cycle, or that the CS pin be brought low to begin

awakening from hibernation. After a time of TRESTORE,

the device will again be ready to operate. All data in

the EEPROM portion of the memory cells will be

transferred back to the SRAM portion of the memory

cells, and the nonvolatile user space and register

values will also be restored.

FIGURE 12-1:

HIBERNATE WAVEFORM

13.0 TRIP VOLTAGE

The 48LXXX has an internal voltage reference that is

used to create a trip voltage threshold (VTRIP). When

VCAP rises above VTRIP, a power-up event is detected.

If this is the first power-up event after a POR, then an

AutoRecall operation is initiated. When VCAP falls

below VTRIP, a power-down event is detected and an

AutoStore operation is initiated if the ASE in the

STATUS register is set to ‘1’ and if the array has been

modified.

13.1

Power Switchover

Once VCC is disconnected, it will not be reconnected

until both VCC is greater than VCAP and any internal

store cycles (AutoStore or Software Store) are com-

plete. This guards against continuously connecting

and disconnecting VCC when VCAP falls faster than

VCC.

To support the AutoStore feature, the 48LXXX must be

able to charge the capacitor connected to the VCAP pin

when power is available on VCC, and also automatically

switch to being powered from the VCAP pin when power

is removed internal to the device from VCC. Since the

VCAP pin is used as part of the internal power bus, this

means that the VCC pin must be disconnected inter-

nally to the device when power to the system ceases.

To accomplish this, the 48LXXX has an intelligent

power switchover circuit that continuously monitors the

voltages on both the VCC and VCAP pins.

During a power-up event, VCC is initially connected

internally in the device to the VCAP pin, allowing it to

rise above the VCAP pin voltage level. Once the VCC pin

voltage level is above the VCAP pin voltage level, the

VCAP pin is connected to the VCC pin internally,

charging the external capacitor back through the

device. When the VCAP pin voltage level rises to VTRIP,

the AutoRecall operation is triggered.

During a power-down event, the VCC pin is initially con-

nected to the internal power bus. As Vcc falls, it dis-

charges the external cap, causing VCAP to also fall.

Once the VCAP pin voltage level falls below VTRIP, the

AutoStore operation is triggered, and the VCC pin is dis-

connected internally to prevent discharging the exter-

nal VCAP capacitor any further through the VCC pin.

Once the VCC pin is disconnected internally, it will not

be reconnected until both the VCC pin voltage is greater

than the VCAP pin voltage and any internal store cycles

(AutoStore or Software Store) are complete.This

guards against continuously internally connecting and

disconnecting the VCC pin to the VCAP pin when the

VCAP voltage falls faster than the VCC voltage as it

moves the SRAM data to EEPROM backup.

SCK

High-Impedance

Hibernate Opcode

MSb

TSTORE THIBERNATE TRESTORE

Instruction

Note: When VCAP is below VTRIP, the 48LXXX

cannot be accessed and will not

Acknowledge any commands.

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