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LTC2445 Datenblatt(PDF) 16 Page - Linear Technology |
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LTC2445 Datenblatt(HTML) 16 Page - Linear Technology |
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16 / 28 page ![]() LTC2444/LTC2445/ LTC2448/LTC2449 16 sn2444589 2444589fs External Serial Clock, Single Cycle Operation (SPI/MICROWIRE Compatible) This timing mode uses an external serial clock to shift out the conversion result and a CS signal to monitor and control the state of the conversion cycle, see Figure 4. The serial clock mode is selected by the EXT pin. To select the external serial clock mode, EXT must be tied low. The serial data output pin (SDO) is Hi-Z as long as CS is HIGH. At any time during the conversion cycle, CS may be pulled LOW in order to monitor the state of the converter. While CS is pulled LOW, EOC is output to the SDO pin. EOC = 1 (BUSY = 1) while a conversion is in progress and EOC = 0 (BUSY = 0) if the device is in the sleep state. Independent of CS, the device automatically enters the low power sleep state once the conversion is complete. When the device is in the sleep state (EOC = 0), its conversion result is held in an internal static shift regis- ter. The device remains in the sleep state until the first rising edge of SCK is seen. Data is shifted out the SDO pin on each falling edge of SCK. This enables external circuitry to latch the output on the rising edge of SCK. EOC can be latched on the first rising edge of SCK and the last bit of the conversion result can be latched on the 32nd rising edge of SCK. On the 32nd falling edge of SCK, the device begins a new conversion. SDO goes HIGH (EOC = 1) and BUSY goes HIGH indicating a conversion is in progress. At the conclusion of the data cycle, CS may remain LOW and EOC monitored as an end-of-conversion interrupt. Alternatively, CS may be driven HIGH setting SDO to Hi-Z and BUSY monitored for the completion of a conversion. Figure 4. External Serial Clock, Single Cycle Operation MSB BIT 28 BIT 27 BIT 26 BIT 25 BIT 24 BIT 23 BIT 22 BIT 21 BIT 20 BIT 19 BIT 0 LSB Hi-Z 2444 F05 SIG BIT 29 “0” BIT 30 EOC Hi-Z CS SCK (EXTERNAL) SDI SDO BUSY BIT 31 1 0 EN SGL A2 A1 A0 OSR3 OSR2 OSR1 OSR0 TWOX ODD 12345 6 7 89 10 11 12 13 14 32 CONVERSION SLEEP DATA OUTPUT CONVERSION TEST EOC TEST EOC VCC FO REF+ REF– CH0 CH7 CH8 CH15 COM SCK SDI SDO CS GND 28 35 29 30 8 15 16 23 7 38 37 1,4,5,6,31,32,33 36 34 REFERENCE VOLTAGE 0.1V TO VCC ANALOG INPUTS 2 = EXTERNAL OSCILLATOR = INTERNAL OSCILLATOR 1µF 2.7V TO 5.5V LTC2448 4-WIRE SPI INTERFACE • • • • • • • • • • • • BUSY APPLICATIO S I FOR ATIO |
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