ASIX ELECTRONICS CORPORATION

15

AX88658AB 8-Port 10/100/1000BASE-T Ethernet Switch

CONFIDENTIAL

4.0 Register Descriptions

Register Tables Summary:

Address

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0 Default

00 H

RESERVED

RESERVED

0000 H

01 H

RESERVED

RESERVED

FFFF H

02 H

RxFlowCtrl[7:0]

TxFlowCtrl[7:0]

0000 H

03 H

RESERVED

RESERVED

00FF H

04 H

RESERVED

RESERVED

00FF H

05 H

RESERVED

0000 H

06 H

RESERVED

RESERVED

00FF H

07 H

RESERVED

RESERVED

1215 H

08 H

RESERVED

RESERVED

RESERVED

RESERVED

7777 H

09 H

RESERVED

RESERVED

RESERVED

RESERVED

7777 H

0A H

PortPair1[7:0]

PortPair0[7:0]

0000 H

0B H

PortPair3[7:0]

PortPair2[7:0]

0000 H

D

lw_LowQueueDiscardLimit [9:0]

1060 H

1060 H

0E H RES PTO RES MPS[1:0] SR

8880 H

0F H

RESERVED

MaxAge[8:0]

1865 H

10 H Trunk47[2:0]

Trunk30[2:0]

RESERVED

00C0 H

RESERVED

LowQueueFlowCtrlMark[9:0]

0010 H

12 H

MaxJam[5:0]

HighQueueFlowCtrlMark[9:0]

2810 H

13 H

RESERVED

hw_LowQueueDiscardLimit[9:0]

0070 H

[1:0]

RES

RESERV

ED

hw_HighQueueDiscardLimit[9:0]

0070 H

15 H

Port-based VLAN Group #1

Port-based VLAN Group #0

0000 H

16 H

Port-based VLAN Group #3

Port-based VLAN Group #2

0000 H

17 H

Port-based VLAN Group #5

Port-based VLAN Group #4

0000 H

18 H

Port-based VLAN Group #7

Port-based VLAN Group #6

0000 H

19 H

ResolutionIngress Port 1[7:0]

ResolutionIngress Port 0[7:0]

FFFF H

1A H

ResolutionIngress Port 3[7:0]

ResolutionIngress Port 2[7:0]

FFFF H

1B H

ResolutionIngress Port 5[7:0]

ResolutionIngress Port 4[7:0]

FFFF H

1C H

ResolutionIngress Port 7[7:0]

ResolutionIngress Port 6[7:0]

FFFF H

1:0]

IngressMode

ResolutionEngress Port 7[7:0]

00FF H

1E H

UpdateSaForSecurity[7:0]

OneSaSecurityMode[7:0]

0000 H

1F H

GCLK125MHz_Dly1ns_n[7:0]

TargetPort[2:0] JumboLeng13_10[3:0] JumboEnable

0000 H

Note:

1. The word “Reserved” = “Res.” on the above table.

2. Care must be taken that the “Reserved” registers should keep the default value always. Change of any reserved value

may be resulting in unpredictable conditions.

3. The registers can be accessed by internal MPU only. The MPU will read in configuration table, located on EEPROM

at somewhere address, and programs the above registers when every time power on or after system reset.

4. Basically, the registers can be accessed with the same data format as station management (similar to MDC and

MDIO) via ADC and ADIO pins.