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TCA9543ADR.B Datenblatt(PDF) 6 Page - Texas Instruments |
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TCA9543ADR.B Datenblatt(HTML) 6 Page - Texas Instruments |
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6 / 34 page ![]() 6 TCA9543A SCPS206B – MARCH 2014 – REVISED NOVEMBER 2019 www.ti.com Product Folder Links: TCA9543A Submit Documentation Feedback Copyright © 2014–2019, Texas Instruments Incorporated Electrical Characteristics (1) (continued) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN TYP(2) MAX UNIT (5) Cio(ON) depends on the device capacitance and load that is downstream from the device. Ci A1, A0 VI = VCC or GND (3) 1.65 V to 5.5 V 4.5 6 pF INT1–INT0 VI = VCC or GND (3) 1.65 V to 5.5 V 4.5 6 RESET VI = VCC or GND (3) 1.65 V to 5.5 V 4.5 5.5 Cio(OFF) (5) SCL, SDA VI = VCC or GND (3), Switch OFF 1.65 V to 5.5 V 15 19 pF SC1–SC0, SD1–SD0 6 8 RON Switch on-state resistance VO = 0.4 V, IO = 15 mA 4.5 V to 5.5 V 4 10 16 Ω 3 V to 3.6 V 5 13 20 VO = 0.4 V, IO = 10 mA 2.3 V to 2.7 V 7 16 45 1.65 V to 1.95 V 10 25 70 (1) A device internally must provide a hold time of at least 300-ns for the SDA signal (referred to as the VIH min of the SCL signal), in order to bridge the undefined region of the falling edge of SCL. (2) Cb = total bus capacitance of one bus line in pF (3) Data taken using a 1-k Ω pullup resistor and 50-pF load (see Figure 5) 6.6 I 2C Interface Timing Requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 5) STANDARD MODE I2C BUS FAST MODE I2C BUS UNIT MIN MAX MIN MAX fscl I2C clock frequency 0 100 0 400 kHz tsch I2C clock high time 4 0.6 μs tscl I2C clock low time 4.7 1.3 μs tsp I2C spike time 50 50 ns tsds I2C serial-data setup time 250 100 ns tsdh I2C serial-data hold time 0(1) 0(1) μs ticr I2C input rise time 1000 20 + 0.1Cb (2) 300 ns ticf I2C input fall time 300 20 + 0.1Cb (2) 300 ns tocf I2C output fall time 10-pF to 400-pF bus 300 20 + 0.1Cb (2) 300 ns tbuf I2C bus free time between stop and start 4.7 1.3 μs tsts I2C start or repeated start condition setup 4.7 0.6 μs tsth I2C start or repeated start condition hold 4 0.6 μs tsps I2C stop condition setup 4 0.6 μs tvdL(Data) Valid-data time (high to low) (3) SCL low to SDA output low valid 1 1 μs tvdH(Data) Valid-data time (low to high) (3) SCL low to SDA output high valid 0.6 0.6 μs tvd(ack) Valid-data time of ACK condition ACK signal from SCL low to SDA output low 1 1 μs Cb I2C bus capacitive load 400 400 pF |
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