S

1

2

8

9

NACK

ACK

DataOutput

byTransmitter

DataOutput

byReceiver

SCL From

Master

Start

Condition

ClockPulsefor

Acknowledgment

Master

Transmitter/

Receiver

Slave

Receiver

Slave

Transmitter/

Receiver

Master

Transmitter

Slave

Master

Transmitter/

Receiver

I C-Bus

Multiplexer

2

SDA

SCL

13

TCA9543A

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SCPS206B – MARCH 2014 – REVISED NOVEMBER 2019

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Programming (continued)

A device generating a message is a transmitter; a device receiving a message is the receiver. The device that

controls the message is the master and the devices that are controlled by the master are the slaves (see

Figure 10).

Figure 10. System Configuration

The number of data bytes transferred between the start and the stop conditions from transmitter to receiver is not

limited. Each byte of eight bits is followed by one acknowledge (ACK) bit. The transmitter must release the SDA

line before the receiver can send an ACK bit.

When a slave receiver is addressed, it must generate an ACK after the reception of each byte. Also, a master

must generate an ACK after the reception of each byte that has been clocked out of the slave transmitter. The

device that acknowledges must pull down the SDA line during the ACK clock pulse, so that the SDA line is stable

low during the high pulse of the ACK-related clock period (see Figure 11). Setup and hold times must be taken

into account.

A master receiver must signal an end of data to the transmitter by not generating an acknowledge (NACK) after

the last byte has been clocked out of the slave. This is done by the master receiver by holding the SDA line high.

In this event, the transmitter must release the data line to enable the master to generate a stop condition.

Figure 11. Acknowledgment on I2C Bus

Data is transmitted to the TCA9543A control register using the write mode shown in Figure 12.