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STA380WS Datenblatt(PDF) 20 Page - STMicroelectronics

Teilenummer STA380WS
Bauteilbeschribung  Sound Terminal 2-channel high-efficiency digital audio system
PDF  48 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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STA380WS Datenblatt(HTML) 20 Page - STMicroelectronics

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I2C bus specification
STA380WS
20/48
DocID024426 Rev 1
5.3
Write operation
Following the START condition the master sends a device select code with the RW bit set
to 0. The STA380WS acknowledges this and then waits for the byte of internal address.
After receiving the internal byte address the STA380WS again responds with an
acknowledgement.
5.3.1
Byte write
In the byte write mode the master sends one data byte which is acknowledged by the
STA380WS. The master then terminates the transfer by generating a STOP condition.
5.3.2
Multi-byte write
The multi-byte write modes can start from any internal address. The master generating a
STOP condition terminates the transfer.
Figure 9. Write mode sequence
5.4
Read operation
5.4.1
Current address byte read
Following the START condition the master sends a device select code with the RW bit set
to 1. The STA380WS acknowledges this and then responds by sending one byte of data.
The master then terminates the transfer by generating a STOP condition.
5.4.2
Current address multi-byte read
The multi-byte read modes can start from any internal address. Sequential data bytes are
read from sequential addresses within the STA380WS. The master acknowledges each
data byte read and then generates a STOP condition terminating the transfer.
5.4.3
Random address byte read
Following the START condition the master sends a device select code with the RW bit set
to 0. The STA380WS acknowledges this and then the master writes the internal address
byte. After receiving the internal byte address, the STA380WS again responds with an
acknowledgement. The master then initiates another START condition and sends the device
select code with the RW bit set to 1. The STA380WS acknowledges this and then responds
by sending one byte of data. The master then terminates the transfer by generating a STOP
condition.
DEV-ADDR
ACK
STARTRW
SUB-ADDR
ACK
DATAIN
ACK
STOP
BYTE
WRITE
DEV-ADDR
ACK
STARTRW
SUB-ADDR
ACK
DATAIN
ACK
STOP
MULTIBYTE
WRITE
DATAIN
ACK
Obsolete
Product(s)
- Obsolete
Product(s)



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