STA380WS datasheet(40/48 Pages) STMICROELECTRONICS

40 / 48 page

Application information

STA380WS

40/48

DocID024426 Rev 1

Application information

7.1

Application scheme for power supplies

Figure 11 below shows a typical application scheme for the STA380WS.

Special care has to be taken with regard to the power supplies when laying out the PCB. In

particular the 3.3-

 resistors on the digital supplies (VDD_DIG) have to be placed as close

as possible to the device. This prevents unwanted oscillation on the digital parts of the

device due to the inductive effects of the PCB tracks. The same rule also applies to all the

decoupling capacitors; they should be placed as close as possible to the device in order to

limit the effect of spikes on the supplies.

Figure 11. Application diagram

7.2

PLL filter

It is recommended to use the circuit in Figure 12 for the PLL loop filter to achieve the best

performance from the device in general applications. Note that the ground of this filter has to

be connected to the ground of the PLL without any resistive path.

For the component values, it should be remembered that the greater the filter bandwidth,

the shorter the lock time, but the higher the PLL output jitter.

Obsolete

Product(s)

- Obsolete

Product(s)

STA380WS Datenblatt(PDF) 40 Page - STMicroelectronics