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ISO7710FDWR Datenblatt(PDF) 17 Page - Texas Instruments |
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ISO7710FDWR Datenblatt(HTML) 17 Page - Texas Instruments |
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17 / 39 page ![]() 6 Parameter Measurement Information IN OUT CL See Note B VO VI VOL VOH VCC1 0 V tr 50 Input Generator (See Note A) VI VO tf tPLH tPHL 50% 50% 50% 50% 90% 10% A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 50 kHz, 50% duty cycle, tr ≤ 3 ns, tf ≤ 3ns, ZO = 50 Ω. At the input, 50 Ω resistor is required to terminate Input Generator signal. The 50 Ω resistor is not needed in actual application. B. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%. Figure 6-1. Switching Characteristics Test Circuit and Voltage Waveforms VI VCC IN OUT VO CL See Note A IN = 0 V (Devices without suffix F) IN = VCC (Devices with suffix F) VO VI VOL VOH VCC 0 V 1.7 V 50% tDO default high default low See Note B A. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%. B. Power Supply Ramp Rate = 10 mV/ns Figure 6-2. Default Output Delay Time Test Circuit and Voltage Waveforms IN OUT EN VCC1 CL See Note A S1 GND2 GND1 + ± VCM + ± VOH or VOL C = 0.1 µF ±1% C = 0.1 µF ±1% VCC1 Pass-fail criteria: The output must remain stable. A. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%. Figure 6-3. Common-Mode Transient Immunity Test Circuit www.ti.com ISO7710 SLLSER9E – NOVEMBER 2016 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: ISO7710 |
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