LAN9312 datasheet(32/458 Pages) SMSC

32 / 458 page

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

Revision 1.2 (04-08-08)

SMSC LAN9312

DATASHEET

Note 3.3

The IS buffer type is valid only during the time specified in Section 15.5.2, "Reset and

Configuration Strap Timing," on page 445.

Note 3.4

Configuration strap values are latched on power-on reset or nRST de-assertion.

Configuration strap pins are identified by an underlined symbol name. Refer to Section

4.2.4, "Configuration Straps," on page 40 for more information.

Note 3.5

The IS buffer type is valid only during the time specified in Section 15.5.2, "Reset and

Configuration Strap Timing," on page 445 and when in I2C mode.

101

EEPROM

Microwire

Chip Select

EECS

EEPROM Microwire Chip Select: In Microwire

EEPROM mode (EEPROM_TYPE = 0), this pin is

the Microwire EEPROM chip select output.

Note:

In I2C mode (EEPROM_TYPE=1), this pin

is not used and is driven low.

EEPROM

Size Strap 0

EEPROM_SIZE_0

Note 3.3

EEPROM Size Strap 0: Configures the low bit of

the EEPROM size range as specified in Section

10.2, "I2C/Microwire Master EEPROM Controller,"

on page 137. See Note 3.4.

Table 3.6 Dedicated Configuration Strap Pins

NAME

SYMBOL

BUFFER

TYPE

DESCRIPTION

LED Enable

Strap

LED_EN

(PU)

LED Enable Strap: Configures the default value

for the LED_EN bits in the LED Configuration

LED/GPIO pins are configured as GPIOs. When

latched high, all 8 LED/GPIO pins are configured

as LEDs. See Note 3.6.

PHY Address

Strap

PHY_ADDR_SEL

(PU)

PHY Address Select Strap: Configures the default

MII management address values for the PHYs

(Virtual, Port 1, and Port 2) as detailed in Section

7.1.1, "PHY Addressing," on page 82.

See Note 3.6.

Table 3.5 EEPROM Pins (continued)

NAME

SYMBOL

BUFFER

TYPE

DESCRIPTION

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