LAN9312 datasheet(63/458 Pages) SMSC

63 / 458 page

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

SMSC LAN9312

Revision 1.2 (04-08-08)

DATASHEET

Total multicast packets (Section 14.5.2.37, on page 359)

Total packets with a late collision (Section 14.5.2.38, on page 360)

Total packets with excessive collisions (Section 14.5.2.39, on page 361)

Total packets with a single collision (Section 14.5.2.40, on page 362)

Total packets with multiple collisions (Section 14.5.2.41, on page 363)

Total collision count (Section 14.5.2.42, on page 364)

6.4

Switch Engine (SWE)

The switch engine (SWE) is a VLAN layer 2 (link layer) switching engine supporting 3 ports. The SWE

supports the following types of frame formats: untagged frames, VLAN tagged frames, and priority

tagged frames. The SWE supports both the 802.3 and Ethernet II frame formats.

The SWE provides the control for all forwarding/filtering rules. It handles the address learning and

aging, and the destination port resolution based upon the MAC address and VLAN of the packet. The

SWE implements the standard bridge port states for spanning tree and provides packet metering for

input rate control. It also implements port mirroring, broadcast throttling, and multicast pruning and

filtering. Packet priorities are supported based on the IPv4 TOS bits and IPv6 Traffic Class bits using

a DIFFSERV Table mapping, the non-DIFFSERV mapped IPv4 precedence bits, VLAN priority using

a per port Priority Regeneration Table, DA based static priority, and Traffic Class mapping to one of 4

QoS transmit priority queues.

The following sections detail the various features of the switch engine.

6.4.1

MAC Address Lookup Table

The Address Logic Resolution (ALR) maintains a 1024 entry MAC Address Table. The ALR searches

the table for the destination MAC address. If the search finds a match, the associated data is returned

indicating the destination port or ports, whether to filter the packet, the packets priority (used if

enabled), and whether to override the ingress and egress spanning tree port state. Figure 6.3 displays

the ALR table entry structure. Refer to the Switch Engine ALR Write Data 0 Register

(SWE_ALR_WR_DAT_0) and Switch Engine ALR Write Data 1 Register (SWE_ALR_WR_DAT_1) for

detailed descriptions of these bits.

Figure 6.3 ALR Table Entry Structure

Age /

Override

Valid

Static

Filter

Priority

Port

MAC Address

...

Bit

LAN9312 Datenblatt(PDF) 63 Page - SMSC Corporation

LAN9312 Datenblatt(HTML) 63 Page - SMSC Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datenblatt Download

Link URL