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LAN9312 Datenblatt(PDF) 71 Page - SMSC Corporation

Teilenummer LAN9312
Bauteilbeschribung  High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
PDF  458 Pages
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Hersteller  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

LAN9312 Datenblatt(HTML) 71 Page - SMSC Corporation

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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
71
Revision 1.2 (04-08-08)
DATASHEET
6.4.6
Ingress Flow Metering and Coloring
The LAN9312 supports hardware ingress rate limiting by metering packet streams and marking packets
as either Green, Yellow, or Red according to three traffic parameters: Committed Information Rate
(CIR), Committed Burst Size (CBS), and Excess Burst Size (EBS). A packet is marked Green if it does
not exceed the CBS, Yellow if it exceeds to CBS but not the EBS, or Red otherwise.
Ingress flow metering and coloring is enabled via the Ingress Rate Enable bit in the Switch Engine
Ingress Rate Configuration Register (SWE_INGRSS_RATE_CFG). Once enabled, each incoming
packet is classified into a stream. Streams are defined as per port (3 streams), per priority (8 streams),
or per port & priority (24 streams) as selected via the Rate Mode bits in the Switch Engine Ingress
Rate Configuration Register (SWE_INGRSS_RATE_CFG). Each stream can have a different CIR
setting. All streams share common CBS and EBS settings. CIR, CBS, and EBS are programmed via
the Switch Engine Ingress Rate Command Register (SWE_INGRSS_RATE_CMD) and Switch Engine
Ingress Rate Write Data Register (SWE_INGRSS_RATE_WR_DATA).
Each stream is metered according to RFC 2697. At the rate set by the CIR, two token buckets are
credited per stream. First, the Committed Burst bucket is incremented up to the maximum set by the
CBS. Once the Committed Burst bucket is full, the Excess Burst bucket is incremented up to the
maximum set by the EBS. The CIR rate is specified in time per byte. The value programmed is in
approximately 20 nS per byte increments. Typical values are listed in Table 6.3. When a port is
receiving at 10Mbps, any setting faster than 39 has the effect of not limiting the rate.
11 - Listening
Received packets on the port are
discarded.
Transmissions to the port are blocked.
Learning on the port is disabled.
The MAC Address Table should be programmed
with entries that the host CPU needs to receive
(e.g. the BPDU address). The static and override
bits should be set.
The host CPU may send packets to the port in this
state.
10 - Learning
Received packets on the port are
discarded.
Transmissions to the port are blocked.
Learning on the port is enabled.
The MAC Address Table should be programmed
with entries that the host CPU needs to receive
(e.g. the BPDU address). The static and override
bits should be set.
The host CPU may send packets to the port in this
state.
00 - Forwarding
Received packets on the port are
forwarded normally.
Transmissions to the port are sent
normally.
Learning on the port is enabled.
The MAC Address Table should be programmed
with entries that the host CPU needs to receive
(e.g. the BPDU address). The static and override
bits should be set.
The host CPU may send packets to the port in this
state.
Table 6.2 Spanning Tree States (continued)
Port State
Hardware Action
Software Action



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