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H8SX/1663R Datenblatt(PDF) 421 Page - Renesas Technology Corp

Teilenummer H8SX/1663R
Bauteilbeschribung  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1504 Pages
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Hersteller  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX/1663R Datenblatt(HTML) 421 Page - Renesas Technology Corp

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Section 10 DMA Controller (DMAC)
Rev. 2.00 Sep. 24, 2008 Page 389 of 1468
REJ09B0412-0200
Bit
Bit Name
Initial
Value
R/W
Description
19
ERRF
0
R/(W)* System Error Flag
Indicates that an address error or an NMI interrupt has
been generated. This bit is available only in DMDR_0.
Setting this bit to 1 prohibits writing to the DTE bit for all
the channels. This bit is reserved in DMDR_1 to
DMDR_3. It is always read as 0 and cannot be modified.
0: An address error or an NMI interrupt has not been
generated
1: An address error or an NMI interrupt has been
generated
[Clearing condition]
• When clearing to 0 after reading ERRF = 1
[Setting condition]
• When an address error or an NMI interrupt has been
generated
However, when an address error or an NMI interrupt has
been generated in DMAC module stop mode, this bit is
not set to 1.
18
0
R
Reserved
This bit is always read as 0 and cannot be modified.
17
ESIF
0
R/(W)* Transfer Escape Interrupt Flag
Indicates that a transfer escape end interrupt has been
requested. A transfer escape end means that a transfer
is terminated before the transfer counter reaches 0.
0: A transfer escape end interrupt has not been
requested
1: A transfer escape end interrupt has been requested
[Clearing conditions]
• When setting the DTE bit to 1
• When clearing to 0 before reading ESIF = 1
[Setting conditions]
• When a transfer size error interrupt is requested
• When a repeat size end interrupt is requested
• When a transfer end interrupt by an extended repeat
area overflow is requested



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