H8SXSLASH1663R datasheet(433/1504 Pages) RENESAS

433 / 1504 page

Section 10 DMA Controller (DMAC)

Rev. 2.00 Sep. 24, 2008 Page 401 of 1468

REJ09B0412-0200

10.4

Transfer Modes

Table 10.4 shows the DMAC transfer modes. The transfer modes can be specified to the

individual channels.

Table 10.4

Transfer Modes

Address Register

Address

Mode

Transfer mode

Activation Source

Common Function

Source

Destina-

tion

Dual

address

• Normal transfer

• Repeat transfer

• Block transfer

Repeat or block size

= 1 to 65,536 bytes,

1 to 65,536 words, or

1 to 65,536

longwords

• Auto request

(activated by

CPU)

• On-chip module

interrupt

• External request

• Total transfer

size: 1 to 4

Gbytes or not

specified

• Offset addition

• Extended repeat

area function

DSAR

DDAR

Single

address

• Instead of specifying the source or destination address

registers, data is directly transferred from/to the external

device using the

DACK pin

• The same settings as above are available other than address

• One transfer can be performed in one bus cycle (the types of

transfer modes are the same as those of dual address modes)

DSAR/

DACK

DACK/

DDAR

When the auto request setting is selected as the activation source, the cycle stealing or burst access

can be selected. When the total transfer size is not specified (DTCR = H'00000000), the transfer

counter is stopped and the transfer is continued without the limitation of the transfer count.

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